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SaS Seminars 2009
Software and Systems Research Seminar Series
Autumn 2009
Testing of 3D Integrated Circuits: Challenges and Emerging Solutions
Date: Thursday, Dec 17, 2009 Place: Alan Turing Time: 10:15
Prof. Krishnendu Chakrabarty , Duke university, USA
Abstract
Three-dimensional (3D) integrated circuits (IC) promise to overcome barriers in interconnect scaling, thereby offering an opportunity to get higher performance using CMOS technology. Despite these benefits, testing remains a major obstacle that hinders the adoption of 3D integration. Test techniques and design-for-testability (DfT) solutions for 3D ICs have remained largely unexplored in the research community, even though experts in industry have identified a number of test challenges related to the lack of probe access for wafers, test access to modules in stacked wafers/dies, thermal concerns, test economics, and new defects arising from unique processing steps such as wafer thinning, alignment, and bonding. In this talk, the speaker will present an overview of 3D integration, its unique processing and assembly steps, testing and DfT challenges, and some of the solutions being advocated for these challenges. The talk will focus on the use of through-silicon-vias for 3D integration, and related processing steps such as via-first/via-last assembly, face-to-face bonding, and face-to-back bonding. The implications of these processing steps on testing will also be discussed.
Speaker's Profile:
Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now Professor of Electrical and Computer Engineering at Duke University. He is also a member of the Chair Professor Group (honorary position) in Software Theory at the School of Software, Tsinghua University, Beijing, China. Prof. Chakrabarty is a recipient of the National Science Foundation Early Faculty (CAREER) award, the Office of Naval Research Young Investigator award, the Humboldt Research Fellowship from the Alexander von Humboldt Foundation, Germany, and several best papers awards at IEEE conferences. His current research projects include: testing and design-for-testability of integrated circuits; digital microfluidics and biochips, circuits and systems based on DNA self-assembly, and wireless sensor networks. He has authored nine books on these topics (including two in press), published over 320 papers in journals and refereed conference proceedings, and given over 130 invited, keynote, and plenary talks.
Interoperable agent mobility based on the IEEE-FIPA standards
Date: Monday, Nov 16, 2009 Place: Alan Turing Time: 15:15
Jordi Cucurull Juan, IDA, Linköpings universitet
Abstract Mobile agents are autonomous software entities driven by a set of goals and tasks. Reactivity, proactivity, social ability, autonomy, and the ability to move to different network locations, make mobile agents highly suitable for the autonomous and context aware processing of distributed information.
Agent mobility has been proposed for homogeneous environments. The deployment of agent mobility in heterogeneous environments has been hindered by the absence of a common set of interoperation rules and ontologies for different agent middlewares.
In this seminar an interoperable agent migration model based on the communication standards of the IEEE-FIPA organisation will be introduced. The approach encompasses the definition of several specifications to enable the migration of agents among heterogeneous environments. The result is an architecture that provides a basic and extensible common migration process that is completely independent of any specific agent middleware implementation. The architecture is flexible enough to support different kinds of migration methods and future upgrades.
Spring 2009
Stochastic Routing for Delay Tolerant Networks
Date: Tuesday, June 1, 2009 Place: Visionen Time: 10:15
Prof. Zygmunt J. Haas , Cornell University, USA
Abstract
In this talk, I will discuss selected research results in the area of Stochastic Routing. Especially, I will concentrate on the use of Stochastic Routing as it applies to Delay/Disruption Tolerant Networks (DTNs). DTNs are useful for applications with lenient requirements on message latency. Stochastic Routing is especially well suited for mobile DTNs. We demonstrate and compare the operation of some of the Stochastic Routing schemes and discuss a number of potential applications. Gossiping, an example of Stochastic Routing, is a techniques where each node resends the received message with some probability. In fact, flooding is a limiting case of Gossiping, where the retransmission probability equals 1. Numerous variants of Gossiping have been proposed and optimized to implement efficient broadcasting, multicasting, and anycasting. Epidemic Routing, another example of Stochastic Routing schemes, has been suggested as a protocol for DTNs. Unrestricted Epidemic Routing results in shortest packet delivery time and high packet delivery probability at the destination nodes. However, this comes at the cost of excessive number of packet copies in the network, which leads to wasteful energy consumption at the nodes. I will introduce and present the performance of several schemes which, in different ways, restrict Epidemic Routing in the number of generated packet copies. The schemes are compared in regards to the tradeoff between energy consumption and delivery delay, while maintaining fixed delivery rate. Another drawback of Unrestricted Epidemic Routing is that the energy consumption is unequal at the different network nodes. Consequently, the system's lifetime is reduced. I will also discuss several approaches to extend and to maximize the system lifetime of Epidemic Routing.
Speaker's profile: Prof. Zygmunt J. Haas received his Ph.D. in 1988 from Stanford University, at which time he joined the AT&T Bell Laboratories, pursuing research in wireless communications, mobility management, fast protocols, optical networks, and optical switching. In 1995, he joined the faculty of the School of Electrical and Computer Engineering at Cornell University. He heads the Wireless Network Laboratory (wnl.ece.cornell.edu), a research group with extensive contributions in the area of Ad Hoc Networks and Sensor Networks. Dr. Haas is a Fellow of the IEEE and an author of over 200 technical conference and journal papers. He holds eighteen patents in the areas of wireless networks and wireless communications, optical switching, optical networks, and high-speed networking protocols. He has organized numerous workshops, chaired and co-chaired several key conferences in the communications and networking areas, and delivered many tutorials at major IEEE and ACM conferences. His interests include: mobile and wireless communication and networks, modeling and performance evaluation of large and complex systems, and biologically-inspired networks.
Engaging students in the free and open source software (FOSS) movement
Date: Thursday, May 7, 2009 Place: Alan Turing Time: 13:15
Ralph Morelli , Trinity College, USA
Abstract
Although it was started by computer programmers and software engineers, the free and open source software (FOSS) movement has now spread throughout the modern Internet society. The FOSS ideas of open and shared content and its collaborative and peer-based methodology have now spawned a vast number of community-based, free and open collaborative efforts ranging from the creation of repositories of human knowledge (Wikipedia) to distribution of architectural plans (Architects for Humanity) to the publication of scientific research (PLoS). It is important for computing education and for society in general that we harness our students' interests in free and open culture and introduce the FOSS model into our curricula. This talk will describe some of the ways we are trying to incorporate the study and practice of FOSS into courses and independent studies and will make the case for getting students engaged in building FOSS that benefits society.
Introduction to Constraint Satisfaction Complexity and Applications in Spatial and Temporal Reasoning
Date: Tuesday, Apr 21, 2009 Place: Alan Turing Time: 15:15
Dr. Manuel Bodirsky , Ecole Polytechnique, Laboratoire d'Informatique (LIX), Palaiseau, France
Abstract:
The constraint satisfaction framework is known to be sufficiently rich and expressive for representing problems occurring in a wide variety of industrial and scientific applications. This has led to the development of constraint programming languages and very successful commercial constraint solvers.
Due to the importance of the constraint satisfaction problem and the fact that it is in general a computationally hard problem, much research has been devoted to understanding its computational complexity and finding restricted cases that can be solved efficiently.
Qualitative temporal and spatial reasoning is a well-established area in artificial intelligence. The computational complexity of various reasoning tasks has been a central topic in this area, and there are many surprisingly rich formalisms where reasoning is polynomial-time tractable.
We apply techniques from constraint satisfaction complexity to give systematic complexity results for temporal and spatial reasoning formalisms. In particular, we use the so-called universal-algebraic approach that was originally developed for finite domain constraint satisfaction problems, and generalize it to study infinite domain constraint satisfaction problems.
Register Optimisation and Instruction Level Parallelism
Date: Monday, Feb 16, 2009 Place: Alan Turing Time: 10:15
Dr. Sid Touati , INRIA and Universite de Versailles, France
Abstract:
Registers are the fastest addressable memory visible to a program. At the same time, registers constitute the most expensive memory, consequently few registers exist inside processors. The effective use of registers is one of the most important code optimisations for all modern processor architectures, and register optimisation is an active area of research in compiler technology.
The topic of register allocation involves the attention of numerous efforts bringing many fundamental advances in compilation. This talk will make a panorama on the topic, explain the subtleties in the problems of register optimisation and the knowledge we have on them. We will cover the register allocation problems for sequential programs as well as the recent advances for instruction level parallelism.
Speaker's Profile:
Sid TOUATI is an assistant professor at the University of Versailles Saint-Quentin en Yvelines (France). His main scientific interests are fundamental and practical research topics about code analysis and optimisation, instruction level parallelism, and compilation techniques for embedded processors. At present, he is managing some research and Ph.D. projects on these topics, with the active collaboration of INRIA and ST-microelectronics.
Modeling Public Safety Scenarios to Evaluate Wireless Communication Systems
Date: Monday, Feb 9, 2009 Place: Alan Turing Time: 15:15
Dr. Nils Aschenbruck , Universität Bonn, Germany
Abstract: When creating a scenario for performance evaluation of communication systems, modelling mobility and traffic is an important task. The results of the evaluation strongly depend on the models used. Typical assumptions of many models are uniform selection of destinations, nodes are allowed to move over the whole simulation area, and nodes are part of the network all the time (are not switched off and do not leave the network).
An analysis in civil protection maneuvers provides characteristics influencing network performance in public safety communication networks like heterogeneous area-based movement, obstacles, joining/leaving of nodes, and non-uniformly distributed group communication. These characteristics differ significantly from the typical assumptions. The talk will present new models that realistically represent traffic and movement in disaster area scenarios. The new models show specific characteristics. Furthermore, the results of simulative network performance analysis are affected.
Searching for Contents in Mobile DTNs
Date: Tuesday, Jan 28, 2009 Place: Alan Turing Time: 15:15
Prof. Dr. Jörg Ott , Helsinki University of Technology, Finland
Abstract: Delay-tolerant Networking (DTN) provides a platform for applications in environments where end-to-end paths may be highly unreliable or do not exist at all. In many applications such as distributed wikis or photo sharing, users need to be able to find content even when they do not know an unambiguous identifier. In order do bring these applications to the domain of DTNs, a search scheme is required that works despite the unreliable network conditions. We introduce a search scheme that makes no assumptions about the underlying routing protocols and the format of search requests. We evaluate different algorithms for forwarding and terminating search queries, using simulations with different classes of DTN routing protocols for different mobility scenarios.
Page responsible: Christoph Kessler
Last updated: 2012-08-17
