RISE-CODECOMP

Integrated Code Generation

Project leader: Christoph Kessler

PhD students: Mattias Eriksson (2006-), Andrzej Bednarski (RISE-I, 2004-2005)

The ultimate goal of software development is to produce an application that runs on a platform. Code generation is the step that produces machine code. To generate code, it is necessary to solve the tasks of instruction selection (choosing semantically equivalent target instructions), register allocation (deciding which values should reside in registers) and instruction scheduling (ordering of target instructions to minimize an objective function such as time or energy consumption).
Code generation tasks are difficult to solve, and from a software engineering viewpoint it is easier to solve each of them separately. However, there exist strong interdependencies between them, and solving a single task efficiently might compromise the decisions taken in a subsequent task, leading to a final solution of lower quality than expected. These interdependencies are even more difficult to handle for irregular architectures that are often given for embedded system applications.
Hence, an integrated approach to code generation is necessary where high-quality code is to be generated. Longer optimization times are tolerable e.g. in the final compilation step for embedded applications.

In previous work we developed a dynamic-programming based approach to optimal integrated code generation (see Kessler and Bednarski (2006)), which is applicable to VLIW, clustered VLIW, DSP and embedded processors, and we implemented it in a retargetable research prototype called OPTIMIST. This was complemented recently by an alternative optimization engine based on integer linear programming, see Bednarski and Kessler (2006). Currently we are also researching good heuristics that should allow to address very large problem instances in an integrated way, too. Moreover, we investigate novel methods for integrated code generation for larger units of code, focusing on time-critical loops.

Based on our existing OPTIMIST prototype system, we evaluate the impact of using an integrated, retargetable code generator for different DSP processor platforms that are of importance to our industrial partners.

We also investigate additional strategies how different aspects of code generation (instruction selection, scheduling, register allocation, intermediate representation, data and control dependence, target architecture specifics, assembler format, memory management, solution space organization, etc.) can be (partially) separated and specified more or less independently in separate modules without dictating a phase-decoupled software design for the code generator.

Industry contacts: IAR Systems AB, Uppsala, and Softube AB, Linköping

Produced degrees: Andrzej Bednarski, PhD June 2006

Project publications: list of OPTIMIST publications (in RISE since July 2004)

Software prototype: OPTIMIST homepage

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Last updated: 2012-05-07