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AUTHOR:ZHIYUAN HE
Found 16 entries
  1. Thermal-Aware SoC Test Scheduling
    Zhiyuan He, Zebo Peng, Petru Eles
    Book Chapter in "Design and Test Technology for Dependable Systems-on-chip", Editors: Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus, ISBN: 978-1-6096-0212-3, 2010.
  2. Temperature-Aware SoC Test Scheduling Considering Inter-Chip Process Variation
    Nima Aghaee, Zhiyuan He, Zebo Peng, Petru Eles
    19th IEEE Asian Test Symposium (ATS10), Shanghai, China, December 1-4, 2010.
  3. Temperature Aware and Defect-Probability Driven Test Scheduling for System-on-Chip
    Zhiyuan He
    PhD Thesis No. 1321, Dept. of Computer and Information Science, Linköping University, June 2010 (Opponent: Professor Matteo Sonza Reorda, Politecnico di Torino, Italy).
  4. Multi-Temperature Testing for Core-based System-on-Chip
    Zhiyuan He, Zebo Peng, Petru Eles
    Design Automation and Test in Europe (DATE'2010), Dresden, Germany, March 8-12, 2010, pp. 208-213.
  5. Thermal-Aware Test Scheduling for Core-based SoC in an Abort-on-First-Fail Test Environment
    Zhiyuan He, Zebo Peng, Petru Eles
    12th EUROMICRO Conference on Digital System Design (DSD), Patras, Greece, August 27-29, 2009, pp. 239-246.
  6. Simulation-Driven Thermal-Safe Test Time Minimization for System-on-Chip
    Zhiyuan He, Zebo Peng, Petru Eles
    17th Asian Test Symposium (ATS), Sapporo, JAPAN, November 24-27, 2008, pp. 283-288.
  7. Challenges and solutions for thermal-aware SOC testing
    Zebo Peng, Zhiyuan He, Petru Eles
    Informacije midem (ISSN 0352-9045), 37 (4), 2007, pp. 220-227.
  8. System-on-Chip Test Scheduling with Defect-Probability and Temperature Considerations
    Zhiyuan He
    Licentiate Thesis No. 1313, Dept. of Computer and Information Science, Linköping University, June 2007
  9. Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
    Zhiyuan He, Zebo Peng, Petru Eles, Paul Rosinger, Bashir M. Al-Hashimi
    Journal of Electronic Testing; Theory and Applications (JETTA), Special Issue on DFT 2006, Vol. 24, Numbers 1-3, June 2008, pp. 247-257.
  10. A Heuristic for Thermal-Safe SoC Test Scheduling
    Zhiyuan He, Zebo Peng, Petru Eles
    International Test Conference (ITC), Santa Clara, USA, October 21-26, 2007, Lecture 5.2 (pp. 1-10)
  11. Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
    Zhiyuan He, Zebo Peng, Petru Eles, Paul Rosinger, Bashir M. Al-Hashimi
    International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'06), Arlington, Virginia, USA, October 4-6, 2006, pp. 477-485
  12. Power Constrained and Defect-Probability Driven SoC Test Scheduling with Test Set Partitioning
    Zhiyuan He, Zebo Peng, Petru Eles
    Swedish System-on-Chip Conference (SSoCC'06), Kolmården, Sweden, May 4-5, 2006 (Informal Digest)
  13. Power Constrained and Defect-Probability Driven SoC Test Scheduling with Test Set Partitioning
    Zhiyuan He, Zebo Peng, Petru Eles
    Design Automation and Test in Europe Conference (DATE 2006), Munich, Germany, March 6-10, 2006, pp. 291-296
  14. Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment
    Zhiyuan He, Gert Jervan, Petru Eles, Zebo Peng
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 83-86
  15. Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment
    Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)
  16. Hybrid BIST Test Scheduling Based on Defect Probabilities
    Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
    2004 IEEE Asian Test Symposium (ATS 2004), Kenting, Taiwan, November 15-17, 2004, pp. 230-235
( ! ) perl script by Giovanni Squillero with modifications from Gert Jervan   (v3.1, p5.2, September-2002-)