System synthesis of digital systems

Lectures
24 h

Recommended for
Computer sicence and engineering students as well as students working in digital electronics design.

The course was last given
A graduate course with similar topic has been given in 1997.

Goals
Gives the basic knowledge about modern design methods for digital systems containing both hardware and system components.

Prerequisites
Basic knowledge in computer architecture and hardware description languages (e.g., VHDL).

Organization
There will be lectures given by teachers and case studies carried out by the students.

Contents

• Introduction and motivation.
• VHDL basics.
• High-level synthesis (scheduling, allocation and binding, controller synthesis).
• System-level synthesis (component allocation, partitioning, communication synthesis, hardware/software co-design).
• Optimization heuristics for synthesis.
• Transformational approach to synthesis (design representation, basic transformations, pipelining, transformation selection).
• Synthesis of advanced features (subprograms, concurrent processes).
• Hardware/Software partitioning.
• High-level test synthesis (introduction, testability analysis, testability improvement transformations).
• High-level low power synthesis (estimation, power optimization transformations)
• New developments in system synthesis.

Literature
P. Eles, K. Kuchcinski and Z. Peng "System Synthesis with VHDL" published by Kluwer Academic Publisher, December 1997.

Teachers
Zebo Peng, Petru Eles.

Examiner
Petru Eles.

Schedule
April-May 2000.

Examination
Term paper on a selected topic.

Credit
3 credits

Comments
ECSEL Graduate Course

Page responsible: Director of Graduate Studies