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AUTHOR:JAYNARAYAN T. TUDU
Found 3 entries
  1. Scan Cells Reordering to Minimize Peak Power During Test Cycle: A Graph Theoretic Approach
    Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara
    IEEE European Test Symposium (ETS'10), Prague, Czech Republic, May 24-28, 2010.
  2. Graph Theoretic Approach for Scan Cell Reordering to Minimize Peak Shift Power
    Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara
    Great Lakes Symposium on VLSI (GLSVLSI'10), Rhode Island, USA, May 16-18, 2010, pp. 73-78.
  3. Scan Cell Reordering to Minimize Peak Power during Scan Testing of SoC
    Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara
    10th IEEE Workshop on RTL and High Level Testing (WRTLT'09), Hongkong, China, November 27-28, 2009, pp. 43-48.
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