Core Based SOC Testing Using Functional Connections
Project Description
The main focus of this project is to develop methods for transportation and control of tests in
System-On-Chip (SOC) designs. The main objective is to develop a test access methodology that
reuses functional connections, e.g. busses or networks. The reason for this is to decrease the
routing overhead. Additional buffers may be necessary in order to have concurrent application of
the tests. Another property that is considered is the implementation of a test-controller used for
directing the transmission of tests. In this project we propose a technique that deals with the
test scheduling problem with this new properties while minimising the test-controller and buffer
size for a multi-core SOC.
Project Members
Selected Publications
- Study on Combined Test-Data Compression and Test Planning for Testing of Modular SoCs
Anders Larsson, Urban Ingelsson, Erik Larsson, Krishnendu Chakrabarty
Book Chapter in "Design and Test Technology for Dependable Systems-on-chip", Editors: Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus, ISBN: 978-1-6096-0212-3, 2010.
- Test Optimization for Core-based System-on-Chip
Anders Larsson
PhD Thesis No. 1222, Dept. of Computer and Information Science, Linköping University, November 2008 (Opponent: Dr. Nicola Nicolici, McMaster University, Ontario, Canada).
- SOC Test Optimization with Compression-Technique Selection
Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty
A Workshop in Conjunction with the International Test Conference, Santa Clara, CA, USA, October 28-30, 2008 (Informal Digest).
- Core-Level Expansion of Compressed Test Patterns
Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty
17th Asian Test Symposium (ATS), Sapporo, JAPAN, November 24-27, 2008, pp. 277-282.
- Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns
Anders Larsson, Erik Larsson, Krishnendu Chakrabarty, Petru Eles, Zebo Peng
Design, Automation, and Test in Europe (DATE 2008), Munich, Germany, March 10-14, 2008, 188- 193.
- A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS'07), Krakow, Poland, April 2007, pp. 61-66.
- Optimized Integration of Test Compression and Sharing for SOC Testing
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
Design, Automation, and Test in Europe Conference (DATE'07), Nice, France, April 2007, pp. 207-212.
- SOC Test Scheduling with Test Set Sharing and Broadcasting
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
Swedish System-on-Chip Conference (SSoCC'06), Kolmården, Sweden, May 4-5, 2006 (Informal Digest)
- System-on-Chip Test Scheduling and Test Infrastructure Design
Anders Larsson
Licentiate Thesis No. 1206, Dept. of Computer and Information Science, Linköping University, November 2005
- SOC Test Scheduling with Test Set Sharing and Broadcasting
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
IEEE Asian Test Symposium, Kolkata, India, December 18-21, 2005, pp. 162-167
- Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 403-409
- A Constraint Logic Programming Approach to SOC Test Scheduling
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)
- Student-oriented Examination in a Computer Architecture Course
Erik Larsson, Anders Larsson
9th Annual Conference on Innovation and Technology in Computer Science Education, Leeds, UK, June 28-30, 2004, pp 245.
- A Technique for Optimization of System-on-Chip Test Data Transportation
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
9th IEEE European Test Symposium, Corsica, France, May 23-26, 2004, pp. 179-180. (Informal Digest)
- A Technique for Optimisation of SOC Test Data Transportation
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)
- Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), Cambridge, MA, USA, November 3-5, 2003, pp. 385-392
