Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems
Design Automation and Test in Europe Conference (DATE 2002), Paris, France, March 4-8, 2002, pp. 514-521
ABSTRACT
In this paper, we present an efficient two-step iterative synthesis approach for distributed embedded systems containing dynamic voltage scalable processing elements (DVS-PEs), based on genetic algorithms. The approach partitions, schedules, and voltage scales multi-rate specifications given as task graphs with multiple deadlines. A distinguishing feature of the proposed synthesis is the utilisation of a generalised DVS method. In contrast to previous techniques, which simply exploit available slack time, this generalised technique additionally considers the PE power profile during a refined voltage selection to further increase the energy savings. Extensive experiments are conducted to demonstrate the efficiency of the proposed approach. We report up to 43.2% higher energy reductions compared to previous DVS scheduling approaches based on constructive techniques and total energy savings of up to 82.9% for mapping and scheduling optimised DVS systems.
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[SME02] Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles, "Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems", Design Automation and Test in Europe Conference (DATE 2002), Paris, France, March 4-8, 2002, pp. 514-521 |
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