Linköping University

Department of Computer and Information Science

Publication Register

Articles reported during 2002
as published or accepted for publication

Subset: articles originating in ESLAB during 2002


The IDA publication register contains information about articles written by researchers at IDA. The usual bibliographic references are combined with links to on-line copies of those articles whenever available and known.
If the article you are looking for is not in this list, then
maybe it was already reported last year - see last year's list.

002
Luis Alejandro Cortes, Petru Eles, Zebo Peng.
Verification of Real-Time Embedded Systems using Petri Net Models and Timed Automata.
Has been accepted at the 8th International Conference on Real-Time Computing Systems and Applications (RTCSA 2002), to be held in Tokyo, Japan, March 18-20, 2002.

004
Erik Larsson, Zebo Peng.
An Integrated Framework for the Design and Optimization of SOC Test Solutions.
Has been accepted to the Journal of Electronic Testing; Theory and Applications (JETTA),for the Special Issue on Plug-and-Play Test Automation for System-on-a-Chip,to appear in the August 2002 issue (vol. 18, no. 4).

014
Marcus Schmitz, Bashir Al-Hashimi, Petru Eles.
Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems.
Accepted for publication at the Design Automation and Test in Europe Conference (DATE 2002), Paris, March.

015
Mauricio Varea, Luis Alejandro Cortes, Bashir Al-Hashimi, Petru Eles, Zebo Peng.
Symbolic Model Checking of Dual Transition Petri Nets.
Accepted for publication at the 10th International Symposium on Hardware/Software Codesign (CODES 2002), Estes Park, Colorado, May.

016
Traian Pop, Petru Eles, Zebo Peng.
Holistic Scheduling and Analysis of Mixed Time/Event-Triggered Distributed Embedded Systems.
Accepted as a regular paper at the 10th International Symposium on Hardware/Software Codesign (CODES 2002) held in Estes Park, Colorado, USA (May 6-8).

017
Abdil Rashid Mohamed, Zebo Peng, Petru Eles.
BIST Synthesis: An Approach to Resources Optimization under Test Time Constraints.
Accepted to the 5th Design and Diagnostic of Electronic Computer Systems (DDECS2002) held in Brno, Czech, April 16-19.

018
Erik Larsson, Hideo Fujiwara.
Power Constrained Preemptive TAM Scheduling.
Accepted at the European Test Workshop held in Corfu, Greece, May 26-29.

025
Daniel Karlsson, Petru Eles, Zebo Peng.
Formal Verification in a Component-based Reuse Methodology.
Accepted to the International Symposium on System Synthesis (ISSS) held in Kyoto, Japan, 2-4 October 2002.



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