Thermal Aware Test Scheduling for Stacked Multi-Chip-Modules
DATE 2009 Friday Workshop on 3D Integration - Technology, Architecture, Design, Automation, and Test, Nice, France, April 20-24, 2009.
ABSTRACT
[NLS09] Vinay N. S., Erik Larsson, Virendra Singh, "Thermal Aware Test Scheduling for Stacked Multi-Chip-Modules", DATE 2009 Friday Workshop on 3D Integration - Technology, Architecture, Design, Automation, and Test, Nice, France, April 20-24, 2009. |
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