- Adaptive Execution Assistance for Multiplexed Fault-Tolerant Chip Multiprocessors
Pramod Subramanyan, Virendra Singh, Kewal Saluja, Erik Larsson
XXIX IEEE International Conference on Computer Design (ICCD 2011), Massachusetts, USA, October 9-12, 2011.
- Energy-Efficient Fault Tolerance in Chip Multiprocessors Using Critical Value Forwarding
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
The 40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'10), Fairmont Chicago, Millennium Park, Chicago, Illinois, USA, June 28-July 1, 2010, pp. 121-130.
- Energy-Efficient Redundant Execution for Chip Multiprocessors
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
Great Lakes Symposium on VLSI on (GLSVLSI'10), Rhode Island, USA, May 16-18, 2010, pp. 143-146.
- Multiplexed Redundant Execution: A Technique for Efficient Fault Tolerance in Chip Multiprocessors
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
Design Automation and Test in Europe (DATE), Dresden, Germany, March 8-12, 2010, pp. 1572-1577.
- Generation of Minimal Leakage Input Vectors with Constrained NBTI Degradation
Pramod Subramanyan, Ram Rakesh Jangir, Jaynarayan Tudu, Erik Larsson, Virendra Singh
7th IEEE East-West Design & Test Symposium (EWDTS), Moscow, Russia, September 18-21, 2009, pp. 1-4.
- Power Efficient Redundant Execution for Chip Multiprocessors
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
Workshop on Dependable and Secure Nanocomputing, Lisbon, Portugal, June 29, 2009, Paper 9, pp. 1-6.
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