- Test Time Minimization for Hybrid BIST of Core-Based Systems
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin
Journal of Computer Science and Technology, Vol. 21, No. 6, November 2006, pp. 907-912
- An Iterative Approach to Test Time Minimization for Parallel Hybrid BIST Architecture
Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)
- An Iterative Approach to Test Time Minimization for Parallel Hybrid BIST Architecture
Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
The 5th IEEE Latin-American Test Workshop, Cartagena, Colombia, March 8-10, 2004, pp. 98-103
- Hybrid BIST Optimization for Core-based Systems with Test Pattern Broadcasting
Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
The IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), Perth, Australia, January 28-30, 2004, pp. 3-8
- Test Time Minimization for Hybrid BIST of Core-Based Systems
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin
12th IEEE Asian Test Symposium (ATS03), Xian, China, November 17-19, 2003, pp. 318-323
- Test Time Minimization for Hybrid BIST with Test Pattern Broadcasting
Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
The 21st NORCHIP Conference, Riga, Latvia, November 10-11, 2003, pp. 112-116
- Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin
18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), Cambridge, MA, USA, November 3-5, 2003, pp. 225-232
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