Hallberg, J. and Peng, Z. (1995). Synthesis under Local Timing Constraints in the CAMAD High-Level Synthesis System. Technical Report LiTH-IDA-R-95-34, Department of Computer and Information Science, Linköping University, Sweden. (bibtex),
Abstract: This paper describes a technique to use local timing constraints to drive the high-level synthesis process, which has been implemented in the CAMAD system. A design is represented with an Extended Timed Petri Net (ETPN) and local timing constraints are introduced as special arcs, in the control part of the ETPN. A method for checking the consistency of a given set of local timing constraints is described as well as an algorithm that schedules the operations in such a way that the timing constraints are fulfilled. Together with the possibility to compile behavioral VHDL to ETPN this work is a step towards a system that allows high-level behavioral specifications including timing constraints to be efficiently compiled into silicon.
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