Peng, Z. (1990). Design of Clocking Schemes in High-Level Synthesis. Technical Report LiTH-IDA-R-90-46, Department of Computer and Information Science, Linköping University, Sweden. This report will be published in Microprocessing and Microprogramming the EUROMICRO Journal, Vol. 1, 1991. (bibtex),
Abstract: This paper describes an performance-driven optimization approach to high-level synthesis of VLSI systems. In particular, it presents a new algorithm to automatically design clocking schemes for digital VLSI systems. An optimization strategy is used to integrate the clocking scheme design process with the rest of the high-level synthesis sub-tasks, such as data path allocation, control allocation, module binding and system partitioning. The main features of our approach are the integration of the clock design with other synthesis activities and an ability to generate asynchronous clocking schemes by partitioning VLSI systems into time-independent modules.
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