Fagerström, J. and Patel, M. R. (1986). High-level Simulation of Systolic Architecture. Technical Report LiTH-IDA-R-86-24, Department of Computer and Information Science, Linköping University, Sweden. Accepted for the International Workshop on Systolic Arrays, Oxford, July 2-4, 1986. (bibtex),
Abstract: Systolic architectures have proven to be cost-effective and high-performance solutions to a variety of problems often occurring in, for example, signal and image processing. Usually, the developing of a systolic solution to a problem is divided into three major steps: requirements definition, design and implementation. The design phase often consists of an ad hoc choice from a family of possible systolic solutions. To allow the designer to study and evaluate various trade- offs in different designs we propose to use a high-level simulation package tailored for systolic architectures. The system will be used for teaching under-graduates basic design principles as well as well-developed contemporary designs.
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