Latency-Aware Packet Processing on CPU-GPU Heterogeneous Systems
DAC 2017, Austin, TX, June 18-22
In the era of IoT, there is a need to move from costly specific-purpose hardware to flexible general-purpose devices for packet processing. Among such devices, GPUs have attracted significant attention. One important aspect of such applications is the packet latency. Unfortunately, this aspect has been mostly ignored. We propose a method that considers the bit-rate of the traffic and minimizes the latency, while meeting the rate demand. We propose a persistent kernel based software architecture to overcome the challenges inherent in GPU implementation. Our technique reduces the packet latency on average by a factor of 3.5.
[MDDA17] Arian Maghazeh, Unmesh D. Bordoloi, Usman Dastgeer, Alexandru Andrei, Petru Eles, Zebo Peng, "Latency-Aware Packet Processing on CPU-GPU Heterogeneous Systems", DAC 2017, Austin, TX, June 18-22