Student Theses
Listed on this page are the student theses that have been or are currently supervised at ESLAB. If you are interested in writing your thesis at ESLAB, please visit this page.Ongoing work
- Study and describe the example case, i.e. the tool/model selected by Volvo.
- Select a few relevant optimization algorithms to be evaluated.
- Implement and apply the optimization algorithms.
- Evaluate and compare results with the existing (human designer-based) solution(s).
- Software development
- Search and optimization algorithms
- Implementation and demonstration of an embedded test controller on FPGA
- Farrokh Ghani Zadegan, Analysis and Optimization for Testing Using IEEE P1687, LIU-IDA/LITH-EX-A--10/040--SE
- Shih-Yen Chang, Placement of measurement points for wear-out prediction with regard to electromigration, LIU-IDA/LITH-EX-A--10/033--SE
- Erik Karlsson, Analysis and Development of Error-free Job Mappping and Scheduling for Network-on-Chips with Homogenous Processors, LIU-IDA/LITH-EX-G--10/007--SE
- Daniel Ahlström, Minimizing memory requirements for deterministic test data in embedded testing, LIU-IDA/LITH-EX-G--10/006--SE
- Niklas Huss, Automating IEEE 1500 Wrapper Insertion, LIU-IDA/LITH-EX-A--09/055--SE
- Aijaz Baig, Embedded Boundary Scan for Test and Debug LIU-IDA/LITH-EX-A--09/031--SE
- Mikael Väyrynen, Fault/Tolerant Average Execution Time Optimization for General-Purpose Multi-Processor System-on-Chips LIU-IDA/LITH-EX-A--09/022--SE
- Carl-Fredrik Neikter Cache Prediction and Execution Time Analysis on Real-Time MPSoC, LIU-IDA/LITH-EX-A--08/046--SE
- Boris Asadanin, Optimizing Mobile Phone Free Fall Drop Test Equipment - Precision, Repeatability, and Time Efficiency LIU-IDA/LITH-EX-A--08/060--SE
- Joanna Siew, Advanced Scan Chain Diagnosis Algorithms. LITH-IDA/LITH-EX-A--08/027--SE
- Stefan Trimmel, Utvärdering av modellbaserad testning av en basstationskontroller. LITH-IDA/LITH-EX-A--08/023--SE
- Michael Söderman, Loss-less on-chip test response compression for diagnosis and debug in volume production of system-on-chip. LITH-IDA/LITH-EX-A--08/009--SE, Produced publication
- Niklas Brammer, Undersökning av automatiserad interoperabilitetstest av mobila terminaler. LITH-IDA/LITH-EX-A--08/009--SE
- Xin Zhang,
Core-level compression technique selection and SOC test architecture
co-optimization. LITH-IDA/LITH-EX-A--08/003--SE, Produced
publication
- Dan Adolfsson Improved Scan Chain Diagnosis. LITH-IDA/DS-EX--07/005--SE, Winner of "Lilla Polhemspriset" (best Master thesis in Sweden) 2008.
- Mikael Löfqvist, Open Code Translation from Executable and Translatable UML Models - Implicit Bridging. LITH-IDA/DS-EX--07/004--SE
- Katarina Larsson,
Komprimering
av testdata för SOC - En implementation av metoden vector
repeat. LITH-IDA/DS-EX-ING--07/002--SE
- Tobias Dubois,
Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO. LITH-IDA/DS-EX--07/002--SE,
Produced
publication
- Fredrik Andersson Utvärdering av Project Blackdog, LITH-IDA/DS-EX-ING--07/001--SE
- Johan Holmqvist, Utvärdering och vidareutveckling av STAPL för användning inom inbäddad Boundary-Scan baserad test. LITH-IDA/DS-EX--07/001--SE, Produced publication
- Karl Andersson SoC Test Data Compression in an Abort-on-fail Environment. LITH-IDA/DS-EX--06/010--SE
- Karin Hedlund, Multi-site SOC Test with Replace-on-fail and Module Configuration. LITH-IDA/DS-EX--06/003--SE
- Thomas Jansson, Core-based System-on-Chip Test Scheduling with Process Variations. LITH-IDA/DS-EX-ING--06/001--SE
- Mikko Selkälä , Test Data Analysis for Accurate Power Estimation. LITH-IDA/DS-EX--06/004--SE, Produced publication
- Ghennadii Sivatki
Synthesis-driven Derivation of Process Graphs from Functional Blocks for Time-Triggered Embedded Systems. LITH-IDA/DS-EX--05/010--SE - Per Beijer
Testkostnadsminimering för system på kisel genom integrerat val av test, schemaläggning och TAM-design. LITH-IDA/DS-EX-ING--05/003--SE - David Bäckström
Boundary-Scan in the ATCA standard. LITH-IDA/DS-EX--05/008--SE
Produced publication - Soheil Samii
Power Modeling and Scheduling of Tests for Core-based System Chips. LITH-IDA/DS-EX--05/006--SE
- Jon Persson
Deterministic Test Vector Compression/Decompression Using an Embedded Processor and Facsimile Coding. LITH-IDA/DS-EX-ING--05/033--SE
- Shanai Ardi
A Nonlinear Programming Approach for Dynamic Voltage Scaling.
- Erik Stenlund & Tobias Palmkvist
Design och implementation av en roststyrd mobil robot. LITH-IDA/DS-EX-ING--05/002--SE
- Aksel Willgert & Andreas Viitanen
Exploring the impact of Power Modeling Accuracy in System-on-Chip Design Flow. LITH-IDA/DS-EX-ING--05/001--SE
- Urban Ingelsson
Test scheduling for embedded-core based SoCs in an abort-on-fail environment. LITH-IDA/DS-EX--05/001--SE
- Christoffer Crafoord
Concurrent System-on-Chip Test time Minimization using Abort-on-Fail. LITH-IDA-EX--04/076--SE
- Stina Edbom
An Integrated Technique for Time Constrained Test Vector Selection and Test Scheduling. LITH-IDA-EX--04/077--SE
Produced publication - Klas Arvidsson
The Counting Algorithm for Simulation of Million-gate Designs
The thesis has been performed at Virtutech (www.virtutech.com) - Sriharsha Charan Reddy Naidu
Automatic environment generation for formal verification of component-based systems - Jirong Zhu
Towards an extensible visual editor for embedded systems representation models - Fabien Lambergeon
C++ Analysis Library for Deterministic and Stochastic Petri Nets - Alexey Sinelnikov
Testability Analysis and Enhancement for Self-Testable Digital Designs - Henrik Friman
Petri Net Class Library and Translation from PRES+ to Timed Automata
- Johannes Petersson
A flexible simulator for control-dominated distributed real-time systems
- Klas Arvidsson
System-on-chip test access mechanism design during constrainted test scheduling
See SOCTest Projects for more details. - Yuanhui Sun
Automatic behavioral test generation by using a constraint solver
- Syed Zia Akbar Zaidi
Portable Automotive Electronic Models Using Standard XML Technologies
- Oskar Blomberg
Modelling and simulation of real-time systems with discrete and continuous behavior
- Daniel Karlsson
A front-end to a Java-based environment for the design of embedded systems
Optimization and Search in Model-Based Automotive SW/HW Development (in co-operation with Volvo Technology AB)
contact person: Petru ElesBackground
Models are increasingly used in the development of embedded HW/SW for the automotive industry. Several industry research projects (AUTOSAR, ATESST and ModelBus to name a few) have studied and proposed standardized languages, formalisms, data exchange formats, methodology, and platforms for automated tool chains for model-based development. The current state-of-the-art thus enables portions of the development flow to be fully automated, with little or no intervention by designers. There are still many design steps that are hard to automate or cannot be replaced by traditional algorithms. For example design steps that require artistic talent, require experience of the designers that is hard to formalize, or have high computational complexity.
In recent years the increasing computational power has enabled the use of computationally expensive search and optimization algorithms for many different engineering tasks. Machine learning, heuristic optimization and planning algorithms have been combined with guidance and goals from designers to better explore a design space and find optimal solutions. This project will apply these ideas in model-based development of embedded HW/SW in an automotive context. The overall goals are higher quality designs, shorter development time and time to market and lower development costs.
This is an initial project into an area with high potential to be a key component in future automotive development. It is a joint project combining the expertise of Volvo Technology AB, Chalmers University of Technology, and Linkoping University.
The thesis students will be seated at Volvo Technology's premises in Gothenburg.
Project Description
The aim of this project is to assess the feasibility of introducing algorithms and techniques for machine learning / search / heuristic optimization in a model-based development tool chain for automotive embedded systems.
requirements
Students interested in this topic should preferably have knowledge, experience and interest in:
Date Added: May 23, 2011
Maintenance test is used to test an electronic system when it is operational in the field. It is desirable to remotely being able to access the system for testing purposes. To enable remote test of the system, it must be prepared with embedded test features that can be accessed remotely. An embedded test controller is key component that is included in the test design of the system, so that the test process, including manipulation of test data and test evaluation can be automated. The purpose of the work is to implement the proposed technique of minimization of test data for the test and diagnosis of digital systems, and furthermore to evaluate the different alternatives to optimize the test time and memory needs.
Thesis project students: Ghafoor Shah, Saad Arsalan
Supervisors: Urban Ingelsson and Mudassar Majeed