Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems

Petru Eles Author homepage
Krzysztof Kuchcinski
Zebo Peng Author homepage
Alex Doboli
Paul Pop Author homepage

24th EUROMICRO Conference, 1998.

The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have developed algorithms for process graph scheduling based on listscheduling and branch-and-bound strategies. One essential contribution is in the manner in which information on process allocation is used in order to efficiently derive a good quality or optimal schedule. Experiments show the superiority of these algorithms compared to previous approaches like critical-path heuristics and ILP based optimal scheduling. An extension of our approach allows the scheduling of conditional process graphs capturing both data and control flow. In this case a schedule table has to be generated so that the worst case delay is minimized.

Related files:
EUROMICRO-98.formal.pdfVersion in the formal proceedings, Adobe Acrobat portable document in the formal proceedings, postscript document, compressed (with gzip)
EUROMICRO-98.slides.pdfPresentation Slides, Adobe Acrobat portable document
EUROMICRO-98.slides.pptPresentation Slides, Microsoft Powerpoint presentation

[EKPD98] Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alex Doboli, Paul Pop, "Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems", 24th EUROMICRO Conference, 1998.
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