Modeling and Verification of Embedded Systems
Project Description
The focus of this project is the development of a high-level representation and formal verification techniques suitable for real-time embedded systems.The main objectives of the project are:
- Developing a modeling formalism that captures the most relevant aspects of embedded systems and, at the same time, has formal semantics.
- Devising formal verification techniques applicable to systems represented in our model.
Project Members
- Zebo Peng, contact person
- Petru Eles
- Luis Alejandro Cortés
Selected Publications
- Modeling and Formal Verification of Embedded Systems based on a Petri Net Representation
Luis Alejandro Cortes, Petru Eles, Zebo Peng
Journal of Systems Architecture (JSA), Special Issue on System and Circuit Synthesis and Verification, vol. 49, no. 12-15, December 2003, pp. 571-598.
- An Approach to Reducing Verification Complexity of Real-Time Embedded Systems
Luis Alejandro Cortes, Petru Eles, Zebo Peng
14th Euromicro Conference on Real-Time Systems (ECRTS 2002), Work-in-Progress Session, Vienna, Austria, June 19-21, 2002, pp. 45-48.
- Verification of Real-Time Embedded Systems using Petri Net Models and Timed Automata
Luis Alejandro Cortes, Petru Eles, Zebo Peng
8th International Conference on Real-Time Computing Systems and Applications (RTCSA 2002), Tokyo, Japan, March 18-20, 2002, pp. 191-199. - Flexibility Driven Scheduling and Mapping for Distributed Real-Time Systems
Paul Pop, Petru Eles, Zebo Peng
8th International Conference on Real-Time Computing Systems and Applications (RTCSA 2002), March 18-20, 2002, Tokyo, Japan, pp. 337-346
- A Petri Net based Modeling and Verification Technique for Real-Time Embedded Systems
Luis Alejandro Cortes
Licentiate Thesis No. 919, Dept. of Computer and Information Science, Linköping University, Dec. 2001.
- Hierarchical Modeling and Verification of Embedded Systems
Luis Alejandro Cortes, Petru Eles, Zebo Peng
Euromicro Symposium on Digital Systems Design, Warsaw, Poland, Sept. 4-6, 2001, pp. 63-70.
- Verification of Embedded Systems using a Petri Net based Representation
Luis Alejandro Cortes, Petru Eles, Zebo Peng
13th International Symposium on System Synthesis (ISSS 2000), Madrid, Spain, Sept. 20-22, 2000, pp. 149-155.
- Definitions of Equivalence for Transformational Synthesis of Embedded Systems
Luis Alejandro Cortes, Petru Eles, Zebo Peng
6th International Conference on Engineering of Complex Computer Systems (ICECCS 2000), Tokyo, Japan, Sept. 11-15, 2000, pp. 134-142.
- Formal Coverification of Embedded Systems using Model Checking
Luis Alejandro Cortes, Petru Eles, Zebo Peng
26th Euromicro Conference (Digital Systems Design), Maastricht, The Netherlands, Sept. 5-7, 2000, vol. I, pp. 106-113.
- A Petri Net Based Model for Heterogeneous Embedded Systems
Luis Alejandro Cortes, Petru Eles, Zebo Peng
17th IEEE NORCHIP Conference, Oslo, Norway, November 8-9, 1999, pp. 248-255.