MESS: Memory Performance Debugging on Embedded Multi-core Systems
22nd International SPIN Symposium on Model Checking of Software (SPIN 2015), August 24-27, Stellenbosch, South Africa
Multi-core processors have penetrated the modern computing platforms in several dimensions. Such systems aim to achieve high-performance via running computations in parallel. However, the performance of such systems is often limited due to the congestion in shared resources, such as shared caches and shared buses. In this paper, we propose MESS, a performance debugging framework for embedded, multi-core systems. MESS systematically discovers the order of memory-access operations that expose performance bugs due to shared caches. We leverage both on single-core performance profiling and symbolic constraint solving to reveal the interleaved memory-access-pattern that leads to a performance bug. Our baseline framework does not generate any false positive. Besides, its failure to find a solution highlights the absence of performance bugs due to shared caches, for a given input. Finally, we propose an approximate solution that dramatically reduces debugging time, at the cost of a reasonable amount of false positives. Our experiments with several embedded software and a real-life robot controller suggest that we can discover performance bugs in a reasonable time. The implementation of MESS and our experiments are available at https://bitbucket.org/sudiptac/mess.
[C15] Sudipta Chattopadhyay, "MESS: Memory Performance Debugging on Embedded Multi-core Systems", 22nd International SPIN Symposium on Model Checking of Software (SPIN 2015), August 24-27, Stellenbosch, South Africa