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Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems

Paul Pop
 
Petru Eles Author homepage
Zebo Peng Author homepage

Design Automation and Test in Europe (DATE 2003) Conference, 3-7 March 2003, Munich, Germany, pp. 184-189

http://www.date-conference.com

ABSTRACT
We present an approach to schedulability analysis for the synthesis of multi-cluster distributed embedded systems consisting of time-triggered and event-triggered clusters, interconnected via gateways. We have also proposed a buffer size and worst case queuing delay analysis for the gateways, responsible for routing inter-cluster traffic. Optimization heuristics for the priority assignment and synthesis of bus access parameters aimed at producing a schedulable system with minimal buffer needs have been proposed. Extensive experiments and a real-life example show the efficiency of our approaches.


Related files:
date03.formal.pdfVersion in the formal proceedings, Adobe Acrobat portable document
date03.formal.ps.gzVersion in the formal proceedings, postscript document, compressed (with gzip)
date03.slides.pdfPresentation Slides, Adobe Acrobat portable document
date03.slides.pptPresentation Slides, Microsoft Powerpoint presentation
date03.update.pdf, Adobe Acrobat portable document


[PEP03] Paul Pop, Petru Eles, Zebo Peng, "Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems", Design Automation and Test in Europe (DATE 2003) Conference, 3-7 March 2003, Munich, Germany, pp. 184-189
( ! ) perl script by Giovanni Squillero with modifications from Gert Jervan   (v3.1, p5.2, September-2002-)