System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search
Journal on Design Automation for Embedded Systems, vol. 2, 5-32, 1997.
This paper presents two heuristics for automatic hardware/software partitioning of system level specifications. Partitioning is performed at the granularity of blocks, loops, subprograms, and processes with the objective of performance optimization with a limited hardware and software cost. We define the metric values for partitioning and develop a cost function that guides partitioning towards the desired objective. We consider minimization of communication cost and improvement of the overall parallelism as essential criteria during partitioning. Two heuristics for hardware/software partitioning, formulated as a graph partitioning problem, are presented: one based on simulated annealing and the other on tabu search. Results of extensive experiments, including real-life examples, show the clear superiority of the tabu search based algorithm.
[EPKD97] Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alex Doboli, "System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search", Journal on Design Automation for Embedded Systems, vol. 2, 5-32, 1997.