- High-Level and Hierarchical Test Sequence Generation
Gert Jervan, Zebo Peng, Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
Swedish System-on-Chip Conference (SSoCC'03), Sunbyholms Slott, Eskilstuna, Sweden, April 8-9, 2003 (Informal Digest)
- High-Level and Hierarchical Test Sequence Generation
Gert Jervan, Zebo Peng, Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
IEEE International Workshop on High Level Design Validation and Test, Cannes, France, October 27-29, 2002, pp. 169-174
- Report D1: Report on benchmark identification and planning of experiments to be performed
Gert Jervan, Zebo Peng, Matteo Sonza Reorda, Massimo Violante
COTEST Project Report, Politecnico di Torino, Linköping University, 2002.
- Report D2: Report on automatic generation of test benches from system-level descriptions
Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
COTEST Project Report, Politecnico di Torino, 2002.
- Report D4: Final Report on Project Results
Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante, Petru Eles, Gert Jervan, Zebo Peng
COTEST Project Report, Politecnico di Torino, Linköping University, 2002.
- Report D5: Report on Dissemination Plan
Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante, Petru Eles, Gert Jervan, Zebo Peng
COTEST Project Report, Politecnico di Torino, Linköping University, 2002.
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