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Call for Participation in a SYDIC-Training Course on

System-Level Design of Embedded Systems

Objective

The aim of the course is to understand the particular problems concerning the design of complex embedded systems. To learn about modern design methodologies with an emphasis on early design phases, not covered by traditional methods, including modeling, verification and system-level synthesis. It also discusses the topics of embedded real-time systems, and power related issues at the system level.

Target Audience

Designers and engineers interested in system-level design and modeling for embedded systems.

Course Contents

  • Embedded systems and their design
  • Characteristics and requirements
  • Models of computation and specification languages
  • Embedded system architectures
  • Real-time embedded systems: task scheduling
  • System-level power/energy optimization

Course Organization

Schedule

  • Wednesday, May 5
        08:30-09:00 Registration and coffee
        09:00-18:00 Lecture
  • Thursday, May 6
        09:00-18:00 Lecture
  • Friday, May 7
        09:00-17:00 Lab exercise

Download the course flyer here!

When
May 5-7, 2004
(3 days)
Where
Conference room "Donald Knuth"
Linköping University
Organizer
Prof. Zebo Peng
Embedded Systems Lab
Course Fee

Free for participants from partners' organisations
(Please contact Prof. Zebo Peng for further information).

Others: 10 000 SEK for the whole course, 7 000 SEK for the lecture part

Register Now!

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The course is given in the framework of the EU project IST-2001-35100 SYDIC-Training