Call for Participation in a SYDIC-Training Course on
System-Level Design of Embedded Systems
ObjectiveThe aim of the course is to understand the particular problems concerning the design of complex embedded systems. To learn about modern design methodologies with an emphasis on early design phases, not covered by traditional methods, including modeling, verification and system-level synthesis. It also discusses the topics of embedded real-time systems, and power related issues at the system level. Target AudienceDesigners and engineers interested in system-level design and modeling for embedded systems. Course Contents
Course Organization
Schedule
Download the course flyer here! |
When | |
May 5-7, 2004 (3 days) |
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Where | ||
Conference room "Donald Knuth" Linköping University |
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Organizer | ||
Prof. Zebo Peng Embedded Systems Lab |
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Course Fee | ||
Free for participants from partners' organisations Others: 10 000 SEK for the whole course, 7 000 SEK for the lecture part |
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Offline |
The course is given in the framework of the EU project IST-2001-35100 SYDIC-Training