Embedded Systems Lab  
Ph.D. students
  1. Anders Larsson, Test Optimization for Core-based System-on-Chip, November 2008, Produced publication
Master and Bachelor students

    2011

  1. Jacob Haraldsson, Vidareutveckling av provplattform för mätning av kosmisk strålnings inverkan på RAM minne, LIU-IDA/LITH-EX-G—11/008—SE
  2. 2010

  3. Farrokh Ghani Zadegan, Analysis and Optimization for Testing Using IEEE P1687, LIU-IDA/LITH-EX-A--10/040--SE
  4. Shih-Yen Chang, Placement of measurement points for wear-out prediction with regard to electromigration, LIU-IDA/LITH-EX-A--10/033--SE
  5. Erik Karlsson, Analysis and Development of Error-free Job Mappping and Scheduling for Network-on-Chips with Homogenous Processors, LIU-IDA/LITH-EX-G--10/007--SE
  6. Daniel Ahlström, Minimizing memory requirements for deterministic test data in embedded testing, LIU-IDA/LITH-EX-G--10/006--SE
  7. 2009

  8. Niklas Huss, Automating IEEE 1500 Wrapper Insertion, LIU-IDA/LITH-EX-A--09/055--SE
  9. Aijaz Baig, Embedded Boundary Scan for Test and Debug, LIU-IDA/LITH-EX-A--09/031--SE
  10. Mikael Väyrynen, Fault-Tolerant Average Execution Time Optimization for General-Purpose Multi-Processor System-on-Chips, LIU-IDA/LITH-EX-A--09/022--SE, Produced publication
  11. 2008

  12. Boris Asadanin, Optimizing Mobile Phone Free Fall Drop Test Equipment - Precision, Repeatability, and Time Efficiency LIU-IDA/LITH-EX-A--08/060--SE
  13. Joanna Siew, Advanced Scan Chain Diagnosis Algorithms. LITH-IDA/LITH-EX-A--08/027--SE, Produced publication
  14. Stefan Trimmel, Utvärdering av modellbaserad testning av en basstationskontroller. LITH-IDA/LITH-EX-A--08/023--SE
  15. Michael Söderman, Loss-less on-chip test response compression for diagnosis and debug in volume production of system-on-chip. LITH-IDA/LITH-EX-A--08/009--SE, Produced publication
  16. Niklas Brammer, Undersökning av automatiserad interoperabilitetstest av mobila terminaler. LITH-IDA/LITH-EX-A--08/009--SE
  17. Xin Zhang, Core-level compression technique selection and SOC test architecture co-optimization. LITH-IDA/LITH-EX-A--08/003--SE, Produced publication

    2007

  18. Dan Adolfsson Improved Scan Chain Diagnosis. LITH-IDA/DS-EX--07/005--SE, Winner of "Lilla Polhemspriset" (best Master thesis in Sweden) 2008., Produced publication
  19. Mikael Löfqvist, Open Code Translation from Executable and Translatable UML Models - Implicit Bridging. LITH-IDA/DS-EX--07/004--SE
  20. Katarina Larsson, Komprimering av testdata för SOC - En implementation av metoden vector repeat. LITH-IDA/DS-EX-ING--07/002--SE

  21. Tobias Dubois, Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO. LITH-IDA/DS-EX--07/002--SE, Produced publication

  22. Fredrik Andersson Utvärdering av Project Blackdog, LITH-IDA/DS-EX-ING--07/001--SE

  23. Johan Holmqvist, Utvärdering och vidareutveckling av STAPL för användning inom inbäddad Boundary-Scan baserad test. LITH-IDA/DS-EX--07/001--SE, Produced publication

    2006

  24. Karl Andersson SoC Test Data Compression in an Abort-on-fail Environment. LITH-IDA/DS-EX--06/010--SE

  25. Karin Hedlund, Multi-site SOC Test with Replace-on-fail and Module Configuration. LITH-IDA/DS-EX--06/003--SE

  26. Thomas Jansson, Core-based System-on-Chip Test Scheduling with Process Variations. LITH-IDA/DS-EX-ING--06/001--SE

  27. Mikko Selkälä , Test Data Analysis for Accurate Power Estimation. LITH-IDA/DS-EX--06/004--SE, Produced publication

    2005

  28. Per Beijer, Testkostnadsminimering för system på kisel genom integrerat val av test, schemaläggning och TAM-design. LITH-IDA/DS-EX-ING--05/003--SE

  29. David Bäckström, Boundary-Scan in the ATCA standard. LITH-IDA/DS-EX--05/008--SE, Produced publication

  30. Soheil Samii, Power Modeling and Scheduling of Tests for Core-based System Chips. LITH-IDA/DS-EX--05/006--SE, Produced publication

  31. Jon Persson, Deterministic Test Vector Compression/Decompression Using an Embedded Processor and Facsimile Coding. LITH-IDA/DS-EX--05/033--SE, Produced publication

  32. Erik Stenlund & Tobias Palmkvist, Design och implementation av en röststyrd mobil robot. LITH-IDA/DS-EX-ING--05/002--SE

  33. Aksel Willgert & Andreas Viitanen, Exploring the impact of Power Modeling Accuracy in System-on-Chip Design Flow. LITH-IDA/DS-EX-ING--05/001--SE

  34. Urban Ingelsson, Test scheduling for embedded-core based SoCs in an abort-on-fail environment. LITH-IDA/DS-EX--05/001--SE, Best thesis at the Department of Computer and Information Science 2005., Produced publication

    2004

  35. Christoffer Crafoord, Concurrent System-on-Chip Test time Minimization using Abort-on-Fail. LITH-IDA-EX--04/076--SE

  36. Stina Edbom, An Integrated Technique for Time Constrained Test Vector Selection and Test Scheduling. LITH-IDA-EX--04/077--SE, Best thesis at the Department of Computer and Information Science 2004. Produced publication
  37. Klas Arvidsson, The Counting Algorithm for Simulation of Million-gate Designs The thesis has been performed at Virtutech
  38. 2002

  39. Klas Arvidsson, System-on-chip test access mechanism design during constrainted test scheduling, Presentation of the work, Arbetet har presenterats på Asian Test Symposium (ATS'02) och i tidskriften Transactions on Computer-Aided-Design of Integrated Circuits. Arbetet belönades av Föreningen Svenskt Näringsliv. (artikel i Corren.) Produced publications
  40. 2001

  41. Robert Lindohf and Mikael Löfqvist, Implementation of a Radio Traffic Simulator for Optimization of Base Station Configurations

    1997

  42. Per-Anders Haraldsson and Mikael Hägglund, Performance Measurement on TSS 2000
Last modified on November 17, 2008 by Erik Larsson