The project, funded by STINT - The Swedish Foundation for International Cooperation in Research and Higher Education- aims for multi-processor system-on-chips (MPSoCs) to find: (1) cost effective and flexible test structures and schemes to be used both at manufacturing test and for test during operation, (2) design support for guiding the introduction of limited redundancy for fault detection and fault tolerance, and (3) fault management at operation, which include finding the best test scheme for each processor depending on each processor's current characteristics and job assignment such that the overall performance for the system is maximized while making ensuring power effective and fault free operation.
The rapid semiconductor technology development makes it possible to fabricate multi-processor system-on-chips (MPSoCs); however, ensuring that MPSoCs are fault free at fabrication and remains as such through their lifetime is a major challenge. Errors can be due to functional design bugs, physical manufacturing defects, signal integrity problems, and timing faults. Many errors manifest themselves only at specific corner cases which are difficult to define tests for. Further, in submicron and nanoelectronic technologies, defects may be created during operation through electrical migration and transistor aging. The increasing process variations at chip fabrication make a set of the same chips having different characteristics. And to make it worse, chips that match when fabricated no longer match after some time in use.
- Dr. Virendra Singh at Supercomputer Education and Research Centre, Indian Institute of Science.
- Dr. Erik Larsson at Department of Computer Science, University of Linköping.