Erik Hansson

På svenska

My supervisor is Prof. Dr. Christoph Kessler. I mainly work in the REPLICA project with compiler and language design.

Contact information

	Erik Hansson Dept. of Computer and Information Science Linköpings universitet SE-581 83 LINKÖPING SWEDEN
	Email: erik.hansson@liu.se
	Phone: +46 13 281467
	Fax: +46 13 282231
	B 3B:464(see map)
	Member of: Programming Environments Laboratory (PELAB) Software and Systems (SaS)

Publications

2012

Amin Shafiee Sarvestani, Erik Hansson, Christoph Kessler:
Extensible Recognition of Algorithmic Patterns in DSP Programs for Automatic Parallelization.
Accepted for publication in International Journal of Parallel Programming, Oct. 2012.
doi:10.1007/s10766-012-0229-2

Amin Shafiee Sarvestani, Erik Hansson, Christoph Kessler:
Towards Domain Specific Automatic Parallelization.
To appear in Proc. MCC'12 Fifth Swedish Workshop on Multicore Computing, Nov. 2012, Stockholm.

Martin Keßler, Erik Hansson, Daniel Åkesson, Christoph Kessler:
Exploiting Instruction Level Parallelism for REPLICA - A Configurable VLIW Architecture With Chained Functional Units.
Proc. 18th Int. Conf. on Parallel and Distributed Processing Techniques and Applications (PDPTA'12), Las Vegas, USA.July 2012.

Jari-Matti Mäkelä, Erik Hansson, Daniel Åkesson, Martti Forsell, Christoph Kessler, Ville Leppänen:
Design of the Language Replica for Hybrid PRAM-NUMA Many-Core Architectures.
Proc. ISPA 2012 4th IEEE International Workshop on Multicore and Multithreaded Architectures and Algorithms, 2012.

Christoph Kessler, Erik Hansson
Flexible Scheduling and Thread Allocation for Synchronous Parallel Tasks.
PASA-2012, München , Germany, Feb. 2012.

2011

Amin Shafiee Sarvestani, Erik Hansson, and Christoph Kessler
Extensible Pattern Recognition in DSP Programs using Cetus
Cetus Users and Compiler Infrastructure Workshop, in conjunction with 20. International Conference on Parallel Architectures and Compilation Techniques (PACT11), October 2011, Galveston, TX, USA.

Erik Hansson, Joar Sohl, Christoph Kessler, Dake Liu:
Case Study of Efficient Parallel Memory Access Programming for the Embedded Heterogeneous Multicore DSP Architecture ePUMA
Proc. Int. Workshop on Multi-Core Computing Systems (MuCoCoS-2011), June 2011, Seoul, Korea. IEEE CS Press.

2010

Erik Hansson, Joar Sohl, Christoph Kessler, Dake Liu:
Case Study of Efficient Parallel Memory Access Programming for an Embedded Heterogeneous Multicore DSP Architecture.
Proc. MCC-2010 Third Swedish Workshop on Multicore Computing, Gothenburg, Sweden, Nov. 2010.

Teaching

Courses

• TDDB68 Concurrent programming and Operating Systems (2009-2013)
• TDDC88 Software engineering (2008-2013)
• TDDD05 Component based software (2010)
• TDDD16 Compilers and Interpreters(2008-2009)
• DF00100 Advanced Compiler Construction (2010,2012)
• DF21500 Multicore Computing (2011)

Master thesis students

• Amin Shafiee Sarvestani: Automated recognition of algorithmic patterns in DSP programs (30 ects). Start March 14. 2011. Presentation December 21. 2011. Workshop paper presented on Cetus Users and Compiler Infastructure Workshop October 2011.


• Daniel Åkesson: An LLVM Back-end for REPLICA - Code Generation for a Multi-core VLIW Processor with Chaining (30 ects). Start August 28. 2011. Presentation February 6. 2012.


• Andreas Lööw: A Functional-Level Simulator for the Configurable (Many-Core) PRAM-Like REPLICA Architecture (30hp.) Start January 3. 2012. Presentation June 11. 2012.


• Cheng Zhou: A source-to-source compiler for the PRAM language Fork to the REPLICA many-core architecture. (30hp) Start 20:e January 20. 2012. Presentation August 20. 2012.