Christoph Kessler
Prof. Dr. Christoph Kessler
PELAB - Programming Environments Laboratory
Software and Systems Division
Department for Computer and Information Science (IDA)
Linköping University
S - 581 83
Linköping, Sweden
Office: PELAB,
B-house,
room 3B:474
phone +46 13 28 2406
mobil +46 70 3666687
fax +46 13 28 58 99
email: chrke \at ida.liu.se
URKUND-address: chrke55.liu \at analys.urkund.se
2 PhD student positions available
in my group
in the following areas:
- Research in performance-portable parallel programming, especially
parallel component frameworks and
optimized parallel software composition for
heterogeneous multi-core and GPGPU architectures;
- Research in compiler back-end technology, especially
integrated global code generation and optimization
for instruction-level parallel DSP architectures.
See the
official announcement in english or
swedish.
Deadline 4/12/2009.
Applications should not be sent
to me but directly
to the department, following their
application guidelines.
Incomplete applications and unsolicited or unspecific
email applications will not be considered.
Research
- Parallel computing
- Parallel programming models, languages, compilers, tools, libraries, algorithms
- especially for heterogeneous multicore processors such as STI Cell/B.E.
- Composition of parallel programs from parallel components
- Optimized composition, autotuning
- Mapping, resource allocation, scheduling of parallel computations
- Compiler technology
- Code generation for instruction-level parallel and embedded processors
- especially, VLIW DSP processors
- Optimization problems in code generation
- Retargetability
- Program analysis and transformation
- Automatic and semiautomatic parallelization
List of publications
Short CV
PhD students
Current Projects:
-
Performance Portability and Programmability for Heterogeneous
Many-core Architectures (PEPPHER)
New EU FP7 project, Jan. 2010 - Dec. 2012.
Leading Workpackage 1 (Compositional parallel software development)
-
DSP Platform for Emerging Telecommunication and Multimedia (ePUMA)
Optimizing DSP streaming applications for memory access cost
on a new reconfigurable chip multiprocessor.
WP3: Classification of memory access patterns in DSP applications;
program analysis for memory access structures, and
automatic selection of most suitable network configuration for
parallel memory access.
Funded 2008-2011 by SSF
-
OPTIMIST: Optimization algorithms for integrated code generation
OPTIMIST is a retargetable, highly optimizing code generator
for superscalar, VLIW, clustered VLIW, DSP and embedded processor architectures.
To achieve high code quality,
it simultaneously considers the optimization problems for
instruction selection (including cluster assignment and
resource allocation),
instruction scheduling,
and register allocation.
Partially funded 2001-2007 by CENIIT
and 2004-2005 by SSF RISE.
- Integrated Software Pipelining
Optimal code generation for loops, integrating both instruction selection,
cluster assignment,
scheduling and register allocation including optimal spill code generation and scheduling,
for embedded, VLIW and clustered VLIW processors.
Funded 2006-2008 and 2010-2012
by Vetenskapsrådet (VR)
and 2006-2011 by the CUGS
graduate school.
-
NestStep
Design and implementation of a MIMD parallel global address space
language
based on the BSP (bulk-synchronous parallel) programming model,
supporting shared variables and nested parallelism
on top of message passing architectures.
NestStep can be seen as a light-weight alternative to
similar languages (OpenMP, UPC),
a main difference being its simplicity
(deadlock-free; deterministic synchronicity and memory consistency).
- NestStep on CELL
Porting the NestStep runtime system to the heterogeneous multicore processor Cell.
BlockLib: Skeleton programming library for Cell.
Optimized composition of parallel components for Cell.
-
SafeModSim
Safe and Secure Modeling and Simulation on the GRID
Partially funded by VINNOVA, 2006-2009.
-
Interactive Invasive Parallelization
User-guided composition of parallel software with an incremental
aspect-oriented parallelization tool.
Covers both automatic parallelization,
skeleton-based structured parallel programming and semiautomatic
program restructuring.
Support for automatic roundtrip engineering in aspect weaving.
Part of the RISE project
funded 2002-2005 and 2006-2007
by SSF.
- PELAB research group on compiler technology and parallel computing
Former Projects:
-
Fork:
Fork95 Language Definition and Compiler
for the
SB-PRAM,
a scalable, massively parallel shared memory MIMD computer
with uniform memory access time that works synchronously at the instruction level.
The complete project is described in my recent
book.
The compiler and tools developed for the SB-PRAM are now used in programming
labs for
teaching parallel algorithms.
-
ForkLight: a Fork-like parallel programming
language for asynchronous shared-memory multiprocessors
-
SPARAMAT
A tool for automatic detection of sparse matrix computations and data structures
in application programs by static and dynamic pattern matching techniques,
which is very useful for automatic parallelization and aggressive program
transformations.
(The successor of the former
PARAMAT
project at Saarbrücken.)
Funded 1997-2000 by Deutsche Forschungsgemeinschaft (DFG)
- GridNestStep:
Extending NestStep to a shared-memory programming environment
for nested BSP parallelism on computational grids
and computational P2P systems.
Partially funded 2003-2006 by VINNOVA GridModelica.
- NestStepModelica:
Integrating NestStep constructs in the imperative part of the
Modelica modeling and simulation language.
Some recent presentations
Some recent / upcoming events:
-
MCC-2009 Second Swedish Workshop on Multicore Computing,
Uppsala, Nov. 26-27, 2009
- HiPEAC-2010 conference, Pisa, Jan. 2010
- MODPROD Annual workshop
on model-based product development, Linköping, Feb 9-10, 2010.
- LCTES-2010, Stockholm, Apr. 2010
-
Dagstuhl research seminar 10191 on
Program Composition and Optimization:
Autotuning, Scheduling, Metaprogramming and Beyond, May 2010
- PAPP-2010
7th Int. Workshop on Practical Aspects of High-level Parallel Programming,
Amsterdam, May 31 - June 1, 2010
- SCOPES-2010, St. Goar, June 29-30, 2010
- Euro-Par 2010
- PACT-2010, Vienna, Sep. 2010
Teaching
Undergraduate courses
Graduate courses
List of all courses ever given
Master thesis projects
Profile management
-
Y-PRT profile
programvaruteknik och realtidssystem /
software engineering and realtime systems.
Administration
Memberships:
ACM,
ACM SIGPLAN
IEEE Computer Society
HiPEAC European Network of Excellence on High Performance and Embedded Architecture and Compilation
EAPLS European Association
for Programming Languages and Systems
GI Gesellschaft für Informatik
- GI/ITG-Fachgruppe PARS Parallel-Algorithmen, -rechnerstrukturen und -systemsoftware
- GI-Fachgruppe 0.1.3 Parallele
und verteilte Algorithmen
- GI-Fachgruppe 2.1.4 Programmiersprachen und Rechenkonzepte
- GI-Arbeitskreis Software Engineering für parallele Systeme (SEPARS)
VDI Verein Deutscher Ingenieure
The Swedish Multicore Initiative
Christoph Kessler (chrke \at ida.liu.se)