Automatic Test Program Generation for Out-of-Order Superscalar Processors
Ying ZHANG, Ahmed Rezine, Petru ELES, Zebo PENG
This paper presents a high-level automatic test instruction generation (HATIG) technical that allows, for the first time, to test the scheduling unit of an out-of-order superscalar processor. This technique leverages on existing bounded model checking tools in order to generate software- based self-testing programs from a global EFSM model of the processor under test. The experimental results have demonstrated the efficiency of the proposed technique.
In Proceedings of the 21st IEEE ASIAN TEST SYMPOSIUM, 2012
Last version (pdf) 2012