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TDDC33 Design for Test of Digital Systems

Results


Results for lab assignment 1


  • Achieved fault coverage for combinational circuit c17

NameSurnameFault CoverageNumber of patterns
1GasparKolumban1005
2CarrelLoic1005
3AnandNarayanan1005
4MattiasEriksson1005
5AssmitraDash1006
6Johan Hellman1006
7OskarSjöström1006
8IreneGarcia Martin1006
9RengarajanRagavan1006
10MikaelBengtsson1007
11SaraKarlsson1007
12RakeshTummalapally1007
13YiChing Chen97,927
14LarsHedlund95,835
15SimonAndersson Holmström95,836
16MehmetEmin Sahin91,675
17BekirDogan91,675

  • Achieved fault coverage for sequential circuit s27

NameSurnameFault CoverageNumber of patterns
1MikaelBengtsson93,8112
2Johan Hellman92,2630
3GasparKolumban75,575
4IreneGarcia Martin74,436
5OskarSjöström74,405
6MehmetEmin Sahin73,865
7SimonAndersson Holmström73,815
8LarsHedlund73,815
9AnandNarayanan71,595
10BekirDogan71,594
11YiChing Chen69,054
12RakeshTummalapally65,346
13RengarajanRagavan61,365
14MattiasEriksson60,233
15AssmitraDash56,553
16SaraKarlsson27,988
17CarrelLoic25,5710

Page responsible: Erik Larsson
Last updated: 2012-09-19