@TECHREPORT{R-95-34,
PSURL = {/publications/cgi-bin/tr-fetch.pl?r-95-34+ps},
NUMBER = {R-95-34},
INSTITUTION = ida,
ADDRESS = idaaddr,
YEAR = {1995},
AUTHOR = {Hallberg, Jonas and Peng, Zebo},
TITLE = {Synthesis under Local Timing Constraints in the CAMAD High-Level Synthesis System},
ABSTRACTURL = {/publications/cgi-bin/tr-fetch.pl?r-95-34+abstr},
ABSTRACT = {This paper describes a technique to use local timing constraints to drive the high-level synthesis process, which has been implemented in the CAMAD system. A design is represented with an Extended Timed Petri Net (ETPN) and local timing constraints are introduced as special arcs, in the control part of the ETPN. A method for checking the consistency of a given set of local timing constraints is described as well as an algorithm that schedules the operations in such a way that the timing constraints are fulfilled. Together with the possibility to compile behavioral VHDL to ETPN this work is a step towards a system that allows high-level behavioral specifications including timing constraints to be efficiently compiled into silicon.}