Search Results

Found 472 entries
  1. Probabilistic Analysis of Power and Temperature Under Process Variation for Electronic System Design
    Ivan Ukhov, Petru Eles, Zebo Peng
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  2. Bandwidth-Efficient Controller--Server Co-Design with Stability Guarantees
    Amir Aminifar, Enrico Bini, Petru Eles, Zebo Peng
    Design, Automation & Test in Europe (DATE 2014), Dresden, Germany, March 24-28, 2014.
  3. Ordered Counter Abstraction (Refinable Subword Relations for Parameterized Verification)
    Pierre Ganty, Ahmed Rezine
    8th International Conference on Language and Automata Theory and Applications (LATA 2014), Madrid, Spain, March 10-14, 2014.
  4. Designing Bandwidth-Efficient Stabilizing Control Servers
    Amir Aminifar, Enrico Bini, Petru Eles, Zebo Peng
    IEEE Real-Time Systems Symposium (RTSS 2013), Vancouver, Canada, December 3-6, 2013.
  5. Temperature-Gradient Based Test Scheduling for 3D Stacked ICs
    Nima Aghaee, Zebo Peng, Petru Eles
    20th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2013), Abu Dhabi, United Arab Emirates, December 9-12, 2013.
  6. Process-Variation Aware Multi-Temperature Test Scheduling
    Nima Aghaee, Zebo Peng, Petru Eles
    27th International Conference on VLSI Design (VLSID 2014), IIT Bombay, Mumbai, India, January 5-9, 2014.
  7. An Efficient Temperature-Gradient Based Burn-In Technique for 3D Stacked ICs
    Nima Aghaee, Zebo Peng, Petru Eles
    Design, Automation & Test in Europe (DATE 2014), Dresden, Germany, March 24-28, 2014.
  8. Stability-Aware Analysis and Design of Embedded Control Systems
    Amir Aminifar, Petru Eles, Zebo Peng, Anton Cervin
    International Conference on Embedded Software (EMSOFT 2013), Montreal, Canada, September 29 - October 4, 2013.
  9. Energy-Aware Design of Secure Multi-Mode Real-Time Embedded Systems with FPGA Co-Processors
    Ke Jiang, Adrian Lifa, Petru Eles, Zebo Peng, Wei Jiang
    21st International Conference on Real-Time Networks and Systems (RTNS 2013), Sophia Antipolis, France, October 16-18, 2013.
  10. Statistical Analysis of Process Variation Based on Indirect Measurements for Electronic System Design
    Ivan Ukhov, Mattias Villani, Petru Eles, Zebo Peng
    19th Asia and South Pacific Design Automation Conference (ASP-DAC 2014), SunTec, Singapore, January 20-23, 2014.
  11. Energy Aware Real-Time Scheduling Policy with Guaranteed Security Protection
    Wei Jiang, Ke Jiang, Xia Zhang, Yue Ma
    19th Asia and South Pacific Design Automation Conference (ASPDAC 2014), SunTec, Singapore, January 20-23, 2014
  12. Design Optimization of Security-Sensitive Mixed-Criticality Real-Time Embedded Systems
    Xia Zhang, Jinyu Zhan, Wei Jiang, Yue Ma and Ke Jiang
    1st workshop on Real-Time Mixed Criticality Systems (ReTiMiCS2013), Taipei, Taiwan, August 21, 2013.
  13. A Design Framework for Dynamic Embedded Systems with Security Constraints
    Ke Jiang, Petru Eles, Zebo Peng
    The 12th Swedish System-on-Chip Conference (SSoCC 2013), Ystad, Sweden, May 6-7, 2013 (not reviewed, not printed).
  14. Scenario-Based Network Design for P1687
    Farrokh Ghani Zadegan, Gunnar Carlsson, Erik Larsson
    The 12th Swedish System-on-Chip Conference (SSoCC 2013), Ystad, Sweden, May 6-7, 2013 (not reviewed, not printed).
  15. Temperature-Gradient Based Burn-In for 3D Stacked ICs
    Nima Aghaee, Zebo Peng, Petru Eles
    The 12th Swedish System-on-Chip Conference (SSoCC 2013), Ystad, Sweden, May 6-7, 2013 (not reviewed, not printed).
  16. An Integrated Specification and Verification Technique for Highly Concurrent Data Structures
    Parosh Aziz Abdulla, Frédéric Haziza, Lukas Holik, Bengt Jonsson, Ahmed Rezine
    The 19th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS 2013), Rome, Italy, March 16-24, 2013.
  17. Memorax: Fence Inference under the TSO Memory Model
    Parosh Aziz Abdulla, Mohamed Faouzi Atig, Yu-Fang Chen, Carl Leonardsson, Ahmed Rezine
    The 19th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS 2013), Rome, Italy, March 16-24, 2013.
  18. Verifying Safety and Liveness for the FlexTM Hybrid Transactional Memory
    Parosh Aziz Abdulla, Sandhya Dwarkadas, Ahmed Rezine, Arrvindh Shriramanx, Yunyun Zhu
    Design, Automation & Test in Europe (DATE 2013), Grenoble, France, March 18-22, 2013.
  19. General Purpose Computing on Low-Power Embedded GPUs: Has It Come of Age?
    Arian Maghazeh, Unmesh D. Bordoloi, Petru Eles, Zebo Peng
    13th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2013), Samos, Greece, July 15-18, 2013.
  20. General Purpose Computing on Low-Power Embedded GPUs: Has It Come of Age?
    Arian Maghazeh, Unmesh D. Bordoloi, Petru Eles, Zebo Peng
    Technical reports in Computer and Information Science, ISSN 1654-7233, 2013.
  21. Software Model Checking for GPGPU Programs, Towards a Verification Tool
    Unmesh D. Bordoloi, Ahmed Rezine
    Technical reports in Computer and Information Science, ISSN 1654-7233, 2011.
  22. Probabilistic Timing Analysis for the Dynamic Segment of FlexRay
    Bogdan Tanasa, Unmesh Dutta Bordoloi, Petru Eles, Zebo Peng
    25th Euromicro Conference on Real-Time Systems (ECRTS 2013), Paris, ECE, France, July 9-12, 2013.
  23. Stability of adaptive feedback-based resource managers for systems with execution time variations
    Sergiu Rafiliu, Petru Eles, Zebo Peng
    Real-Time Systems, May 2013, Volume 49, Issue 3, pp 367-400.
  24. Process-variation and Temperature Aware SoC Test Scheduling Technique
    Nima Aghaee, Zebo Peng, Petru Eles
    Journal of Electronic Testing: Theory and Applications, 2013.
  25. Design Optimization of Energy- and Security-Critical Distributed Real-Time Embedded Systems
    Xia Zhang, Jinyu Zhan, Wei Jiang, Yue Ma, Ke Jiang
    15th Workshop on Advances in Parallel and Distributed Computational Models (APDCM 2013), Boston, USA, May 20, 2013.
  26. Optimization of Secure Embedded Systems with Dynamic Task Sets
    Ke Jiang, Petru Eles, Zebo Peng
    Design, Automation & Test in Europe (DATE 2013), Grenoble, France, March 18-22, 2013.
  27. Control-Quality Driven Design of Cyber-Physical Systems with Robustness Guarantees
    Amir Aminifar, Petru Eles, Zebo Peng, Anton Cervin
    Design, Automation & Test in Europe (DATE 2013), Grenoble, France, March 18-22, 2013.
  28. Dynamic Configuration Prefetching Based on Piecewise Linear Prediction
    Adrian Lifa, Petru Eles, Zebo Peng
    Design, Automation & Test in Europe (DATE 2013), Grenoble, France, March 18-22, 2013.
  29. Minimization of Average Execution Time Based on Speculative FPGA Configuration Prefetch
    Adrian Lifa, Petru Eles, Zebo Peng
    International Conference on ReConFigurable Computing and FPGAs (ReConFig 2012), Cancun, Mexico, December 5-7, 2012.
  30. Designing High-Quality Embedded Control Systems with Guaranteed Stability
    Amir Aminifar, Soheil Samii, Petru Eles, Zebo Peng, Anton Cervin
    33rd IEEE Real-Time Systems Symposium (RTSS 2012), San Juan, Puerto Rico, December 4-7, 2012.
  31. Test Tool Qualification through Fault Injection
    Q. Wang, A. Wallin, Viacheslav Izosimov, Urban Ingelsson, Zebo Peng
    IEEE 17th European Test Symposimu (ETS 2012), Annecy, France, May 28-June 1, 2012.
  32. An MPSoCs Demonstrator for Fault Injection and Fault Handling in an IEEE P1687 Environment
    Kim Petersen, Dimitar Nikolov, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    IEEE 17th European Test Symposimu (ETS 2012), Annecy, France, May 28-June 1, 2012.
  33. Level of Confidence Evaluation and Its Usage for Roll-back Recovery with Checkpointing Optimization
    Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson
    5th Workshop on Dependable and Secure Nanocomputing (WSDN 2011), Hong Kong, June 27, 2011.
  34. Study on the Level of Confidence for Roll-back Recovery with Checkpointing
    Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson
    1st Intl. Workshop on Dependability Issues in Deep-submicron Technologies (DDT 2011), Trondheim, Norway, May 26-27, 2011.
  35. Automatic Test Program Generation for Out-of-Order Superscalar Processors
    Ying Zhang, Ahmed Rezine, Petru Eles, Zebo Peng
    21st IEEE Asian Test Symposium (ATS 2012), Niigata, Japan, November 19-22, 2012.
  36. Automatic Test Program Generation Using Executing Trace Based Constraint Extraction for Embedded Processors
    Ying Zhang, Huawei Li, Xiaowei Li
    IEEE Transactions on Very Large Scale Integration Systems, 2012.
  37. A Study of Instrument Reuse and Retargeting in P1687
    Farrokh Ghani Zadegan, Urban Ingelsson, Erik Larsson, Gunnar Carlsson
    IEEE Twelfth Workshop on RTL and High Level Testing (WRTLT 2011), MNIT Jaipur, India, November 25-26, 2011.
  38. Execution Time Minimization Based on Hardware/Software Partitioning and Speculative Prefetch
    Adrian Lifa, Petru Eles, Zebo Peng
    Technical reports in Computer and Information Science, ISSN 1654-7233, rep. no. 11, July 9, 2012.
  39. On the Timing Analysis of the Dynamic Segment of FlexRay
    Unmesh D. Bordoloi, Bogdan Tanasa, Petru Eles, Zebo Peng
    International Symposium on Industrial Embedded Systems (SIES 2012), Karlsruhe, Germany, June 20-22, 2012.
  40. Reliability-Aware Instruction Set Customization for ASIPs with Hardened Logic
    Unmesh D. Bordoloi, Bogdan Tanasa, Mehdi B. Tahoori, Petru Eles, Zebo Peng, Syed Z. Shazli, Samarjit Chakraborty
    International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2012), Seoul, Korea, August 19-22, 2012.
  41. Resource Allocation of Security-Critical Tasks with Statistically Guaranteed Energy Constraint
    Wei Jiang, Ke Jiang, Yue Ma
    International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2012), Seoul, Korea, August 19-22, 2012.
  42. Context-Aware Speculative Prefetch for Soft Real-Time Applications
    Adrian Lifa, Petru Eles, Zebo Peng
    International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2012), Seoul, Korea, August 19-22, 2012.
  43. Test Planning for Core-based 3D Stacked ICs with Through-Silicon Vias
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    25th International Conference on VLSI Design (VLSI 2012), Hyderabad, India, January 7-11, 2012.
  44. Test Planning for Core-based 3D Stacked ICs under Power Constraints
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    3rd IEEE Intl. Workshop on Reliability Aware System Design and Test (RASDAT 2012), Hyderabad, India, January 7-8, 2012.
  45. Test Planning for 3D Stacked ICs with Through-Silicon Vias
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    2nd IEEE Intl. Workshop on Testing Three-Dimensional Stacked Integrated Circuits (3D-TEST), Anaheim, CA, USA, September 22-23, 2011.
  46. Control-Quality Optimization for Distributed Embedded Systems with Adaptive Fault Tolerance
    Soheil Samii, Unmesh D. Bordoloi, Petru Eles, Zebo Peng, Anton Cervin
    24th Euromicro Conference on Real-Time Systems (ECRTS 2012), Pisa, Italy, July 10-13, 2012.
  47. Counter-Example Guided Fence Insertion under TSO
    Parosh Aziz Abdulla, Mohamed Faouzi Atig, Yu-Fang Chen, Carl Leonardsson, Ahmed Rezine
    18th Intl. Conf. on Tools and Algorithms for the Construction and Analysis of Systems (TACAS 2012), Tallinn, Estonia, March 24 - April 1, 2012.
  48. Quality-Driven Synthesis and Optimization of Embedded Control Systems
    Soheil Samii
    PhD Thesis No. 1386, Dept. of Computer and Information Science, Linköping University, September 2011 (Opponent: Professor Samarjit Chakraborty, Institute for Real-Time Computer Systems, Technische Universitat Munchen, Germany).
  49. Steady-State Dynamic Temperature Analysis and Reliability Optimization for Embedded Multiprocessor Systems
    Ivan Ukhov, Min Bao, Petru Eles, Zebo Peng
    Design Automation Conference (DAC 2012), San Francisco, CA, USA, June 3-7, 2012.
  50. Reusing and Retargeting On-Chip Instrument Access Procedures in IEEE P1687
    Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    EDA Industry Standards issue of IEEE Design & Test Magazine, Mar/Apr 2012.
  51. Schedulability Analysis for the Dynamic Segment of FlexRay: A Generalization to Slot Multiplexing
    Bogdan Tanasa, Unmesh D. Bordoloi, Stefanie Kosuch, Petru Eles, Zebo Peng
    Real-Time and Embedded Technology and Applications Symposium (RTAS 2012), Beijing, China, April 16-19, 2012.
  52. Process-Variation and Temperature Aware SoC Test Scheduling Using Particle Swarm Optimization
    Nima Aghaee, Zebo Peng, Petru Eles
    The 6th IEEE International Design and Test Workshop (IDT 2011), Beirut, Lebanon, December 11–14, 2011.
  53. Development Tools
    Paul Pop, A. Goller, Traian Pop, Petru Eles
    Book Chapter in "Time-Triggered Communication", Editor: Roman Obermaisser, ISBN: 978-1-4398-4661-2, 2012.
  54. Customizing Instruction Set Extensible Reconfigurable Processors using GPUs
    Unmesh D. Bordoloi, Bharath Suri, Swaroop Nunna, Samarjit Chakraborty, Petru Eles, Zebo Peng
    25th International Conferennce on VLSI Design, Hyderabad, India, January 07-11, 2012.
  55. A Scalable GPU-Based Approach to Accelerate the Multiple-Choice Knapsack Problem
    Bharath Suri, Unmesh D. Bordoloi, Petru Eles
    Design Automation and Test in Europe (DATE 2012) (short paper), Dresden, Germany, March 12-16, 2012.
  56. Co-Design Techniques for Distributed Real-Time Embedded Systems with Communication Security Constraints
    Ke Jiang, Petru Eles, Zebo Peng
    Design Automation and Test in Europe (DATE 2012), Dresden, Germany, March 12-16, 2012.
  57. Predictable Real-Time Applications on Multiprocessor Systems-on-Chip
    Jakob Rosén
    Licentiate Thesis No. 1503, Dept. of Computer and Information Science, Linköping University, September 2011 (Opponent: Doktor Thomas Nolte (Mälardalens högskola, Mälardalen Real-Time Research Centre (MRTC)))
  58. Testing advanced electronics systems (One-day Tutorial)
    Erik Larsson
    IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2010), Malaysia, December 2010.
  59. Power-Aware SOC Test Planning (Keynote)
    Erik Larsson
    Workshop on RTL and High Level Testing (WRTLT 2008), Sapporo, Japan, November 2008.
  60. Manufacturing Test Solutions for System-On-Chip Integrated Circuits (One-day Tutorial)
    Erik Larsson, Krishnendu Chakrabarty
    VLSI Design and Test Symposium (VDAT 2007), Kolkata, India, August 2007.
  61. Conference Reports - ETS 2011: European Test Symposium
    Erik Larsson
    IEEE Design & Test of Computers, Volume: 28, Issue: 5, September-October 2011, ISSN: 0740-7475, pp. 95.
  62. Low-Energy Standby-Sparing for Hard Real Time Systems
    Alireza Ejlali, Bashir Al-Hashimi, Petru Eles
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 31, No. 3, March 2012, pp. 329-342.
  63. Access Time Analysis for IEEE P1687
    Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    IEEE Transactions on Computers, 2011.
  64. Test Scheduling in an IEEE P1687 Environment with Resource and Power Constraints
    Farrokh Ghani Zadegan, Urban Ingelsson, Golnaz Asani, Gunnar Carlsson, Erik Larsson
    20th IEEE Asian Test Symposium (ATS 2011), New Delhi, India, November 21-23, 2011.
  65. Test Scheduling with Constraints for IEEE P1687 (poster)
    Golnaz Asani, Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    International Test Conference (ITC 2011), Anaheim, CA, USA, September 18-23, 2011.
  66. Scheduling Tests for 3D Stacked Chips under Power Constraints
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    Journal of Electronic Testing: Theory and Applications (JETTA), 2011.
  67. Adaptive Execution Assistance for Multiplexed Fault-Tolerant Chip Multiprocessors
    Pramod Subramanyan, Virendra Singh, Kewal Saluja, Erik Larsson
    XXIX IEEE International Conference on Computer Design (ICCD 2011), Massachusetts, USA, October 9-12, 2011.
  68. Conference Reports - RASDAT 2011: Workshop on Reliability Aware System Design and Test
    Erik Larsson
    IEEE Design & Test of Computers, Volume: 28, Issue: 3, May-June 2011, pp. 82-83.
  69. Conference Reports - RASDAT 2010: Workshop on Reliability Aware System Design and Test
    Erik Larsson
    IEEE Design & Test of Computers, Volume: 27, Issue: 5, Sept.-Oct. 2010, pp. 72-73.
  70. European Test Symposium (ETS) 2011
    Erik Larsson, Einar Aas
    Elektronikk - tidsskrift for IT och telekom, pp. 33, April 2011.
  71. Reliability-Aware Frame Packing for the Static Segment of FlexRay
    Bogdan Tanasa, Unmesh D. Bordoloi, Petru Eles, Zebo Peng
    The Intl. Conf. on Embedded Software (EMSOFT 2011), Taipei, Taiwan, October 9-14, 2011.
  72. Control-Quality Driven Task Mapping for Distributed Embedded Control Systems
    Amir Aminifar, Soheil Samii, Petru Eles, Zebo Peng
    17th IEEE Intl. Conf. on Embedded and Real-Time Computing Systems and Applications (RTCSA 2011), Toyama, Japan, August 29-31, 2011.
  73. Test Scheduling and Test Access Optimization for Core-Based 3D Stacked ICs with Through-Silicon Vias (poster)
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    European Test Symposium (ETS 2011), Trondheim, Norway, May 23-27, 2011.
  74. Scheduling and Mapping in an Incremental Design Methodology for Distributed Real-Time Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng, Traian Pop
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 12, Issue 8, August 2004, pp. 793-811.
  75. Temperature-Aware Idle Time Distribution for Leakage Energy Optimization
    Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 20, Number 7, July 2012, pp. 1187-1200.
  76. On the Quantification of Sustainability and Extensibility of FlexRay Schedules
    Reinhard Schneider, Dip Goswami, Samarjit Chakraborty, Unmesh D. Bordoloi, Petru Eles, Zebo Peng
    48th Design Automation Conference (DAC 2011), San Diego, CA, USA, June 5-10, 2011.
  77. Automated Design for IEEE P1687
    Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    The 11th Swedish System-on-Chip Conference, Varberg, Sweden, May 2-3, 2011 (not reviewed, not printed).
  78. Test Cost Modeling for 3D Stacked Chips with Through-Silicon Vias
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    The 11th Swedish System-on-Chip Conference, Varberg, Sweden, May 2-3, 2011 (not reviewed, not printed).
  79. Level of Confidence Study for Roll-back Recovery with Checkpointing
    Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson
    The 11th Swedish System-on-Chip Conference, Varberg, Sweden, May 2-3, 2011 (not reviewed, not printed).
  80. Worst-Case Execution Time Analysis for Multiprocessor System-on-Chip Platforms
    Jakob Rosén, Petru Eles, Zebo Peng
    The 11th Swedish System-on-Chip Conference, Varberg, Sweden, May 2-3, 2011 (not reviewed, not printed).
  81. Performance Comparison of Simulated Annealing and Tabu Search on Block Cipher Optimization in Distributed Embedded Systems
    Ke Jiang, Petru Eles, Zebo Peng
    The 11th Swedish System-on-Chip Conference, Varberg, Sweden, May 2-3, 2011 (not reviewed, not printed).
  82. Cost Reduction of Wear-Out Monitoring by Measurement Point Selection
    Urban Ingelsson, Shih-Yen Chang, Erik Larsson
    The 11th Swedish System-on-Chip Conference, Varberg, Sweden, May 2-3, 2011 (not reviewed, not printed).
  83. Adaptive Temperature-Aware SoC Test Scheduling Considering Process Variation
    Nima Aghaee, Zebo Peng, Petru Eles
    14th Euromicro Conference on Digital System Design (DSD11), Oulu, Finland, August 31 – September 2, 2011.
  84. Heuristics for Adaptive Temperature-Aware SoC Test Scheduling Considering Process Variation
    Nima Aghaee, Zebo Peng, Petru Eles
    The 11th Swedish System-on-Chip Conference, Varberg, Sweden, May 2-3, 2011 (not reviewed, not printed).
  85. SoC-Level Fault Management based on P1687 IJTAG
    Gunnar Carlsson, Artur Jutman, Erik Larsson
    Design, Automation and Test in Europe (DATE 2011), Grenoble, France, March 14-18, 2011.
  86. Building Reliable Embedded Systems with Unreliable Components
    Zebo Peng
    Invited Paper - Proc. Intl. Conf. on Signals and Electronic Systems (ICSES10), Gliwice, Poland, September 7-10, 2010, pp. 9-13.
  87. Stability Conditions of On-line Resource Managers for Systems with Execution Time Variations
    Sergiu Rafiliu, Petru Eles, Zebo Peng
    23rd Euromicro Conference on Real-Time Systems (ECRTS11), Porto, Portugal, July 6-8, 2011.
  88. Measurement Point Selection for In-Operation Wear-Out Monitoring
    Urban Ingelsson, Shih-Yen Chang, Erik Larsson
    14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS11), Cottbus, Germany, April 13-15, 2011.
  89. Performance Optimization of Error Detection Based on Speculative Reconfiguration
    Adrian Lifa, Petru Eles, Zebo Peng
    48th Design Automation Conference (DAC 2011), San Diego, CA, USA, June 5-10, 2011.
  90. Optimization of Message Encryption for Distributed Embedded Systems with Real-Time Constraints
    Ke Jiang, Petru Eles, Zebo Peng
    14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS11), Cottbus, Germany, April 13-15, 2011.
  91. Optimization of Assertion Placement in Time-Constrained Embedded Systems
    Viacheslav Izosimov, Michele Lora, Graziano Pravadelli, Franco Fummi, Zebo Peng, Giuseppe Di Guglielmo, Masahiro Fujita
    European Test Symposium (ETS11), Trondheim, Norway, May 23-27, 2011.
  92. Test Scheduling for 3D Stacked ICs under Power Constraints
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    2nd IEEE International Workshop on Reliability Aware System Design and Test (RASDAT), Chennai, India, January 6-7, 2011.
  93. Bus Access Design for Combined Worst and Average Case Execution Time Optimization of Predictable Real-Time Applications on Multiprocessor Systems-on-Chip
    Jakob Rosén, Carl-Fredrik Neikter, Petru Eles, Zebo Peng, Paolo Burgio, Luca Benini
    17th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'11), Chicago, IL, USA, April 11-14, 2011.
  94. System-Level Techniques for Temperature-Aware Energy Optimization
    Min Bao
    Licentiate Thesis No. 1459, Dept. of Computer and Information Science, Linköping University, December 2010 (Opponent: Junior Professor Jian-Jia Chen, Karlsruhe Institute of Technology, Germany)
  95. Accelerating System-Level Design Tasks using Graphics Processors (tutorial)
    Udeepta Bordoloi, Samarjit Chakraborty, Unmesh D. Bordoloi
    International Conference on VLSI Design, Chennai, India, January 2-7, 2011.
  96. Optimized Schedule Synthesis under Real-Time Constraints for the Dynamic Segment of FlexRay
    Reinhard Schneider, Unmesh D. Bordoloi, Dip Goswami, Samarjit Chakraborty
    International Conference of Embedded and Ubiquitous Computing, Hong Kong SAR, China, December 11-13, 2010, (best paper award).
  97. Test scheduling on IJTAG
    Erik Larsson, Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson
    Nordic Test Forum (NTF 2010), Drammen, Norway, November 23-24, 2010.
  98. Design Automation for IEEE P1687
    Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    Design, Automation and Test in Europe (DATE 2011), Grenoble, France, March 14-18, 2011.
  99. Power Constrained Test Scheduling for 3D Stacked Chips (poster)
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    1st IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, Austin, TX, USA, November 4-5, 2010.
  100. Scheduling Tests for 3D Stacked Chips Under Power Constraints
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    6th International Symposium on Electronic Design, Test and Applications (DELTA 2011), Queenstown, New Zealand, January 17-19, 2011.
  101. Design Optimization and Synthesis of FlexRay Parameters for Embedded Control Applications
    Soheil Samii, Petru Eles, Zebo Peng, Anton Cervin
    6th International Symposium on Electronic Design, Test and Applications (DELTA 2011), Queenstown, New Zealand, January 17-19, 2011.
  102. On-Line Temperature-Aware Idle Time Distribution for Leakage Energy Optimization
    Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
    6th International Symposium on Electronic Design, Test and Applications (DELTA 2011), Queenstown, New Zealand, January 17-19, 2011.
  103. Predictable Worst-Case Execution Time Analysis for Multiprocessor Systems-on-Chip
    Jakob Rosén, Petru Eles, Zebo Peng, Alexandru Andrei
    6th International Symposium on Electronic Design, Test and Applications (DELTA 2011), Queenstown, New Zealand, January 17-19, 2011 (Best Student Paper Presentation Award).
  104. Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    Book Chapter in "Design and Test Technology for Dependable Systems-on-chip", Editors: Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus, ISBN: 978-1-6096-0212-3, 2010.
  105. Optimizing Fault Tolerance for Multi-Processor System-on-Chip
    Dimitar Nikolov, Mikael Väyrynen, Urban Ingelsson, Erik Larsson, Virendra Singh
    Book Chapter in "Design and Test Technology for Dependable Systems-on-chip", Editors: Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus, ISBN: 978-1-6096-0212-3, 2010.
  106. Thermal-Aware SoC Test Scheduling
    Zhiyuan He, Zebo Peng, Petru Eles
    Book Chapter in "Design and Test Technology for Dependable Systems-on-chip", Editors: Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus, ISBN: 978-1-6096-0212-3, 2010.
  107. Study on Combined Test-Data Compression and Test Planning for Testing of Modular SoCs
    Anders Larsson, Urban Ingelsson, Erik Larsson, Krishnendu Chakrabarty
    Book Chapter in "Design and Test Technology for Dependable Systems-on-chip", Editors: Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus, ISBN: 978-1-6096-0212-3, 2010.
  108. Scheduling and Optimization of Fault-Tolerant Embedded Systems with Transparency/Performance Trade-Offs
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    ACM Transactions on Embedded Computing Systems (TECS).
  109. Value-Based Scheduling of Distributed Fault-Tolerant Real-Time Systems with Soft and Hard Timing Constraints
    Viacheslav Izosimov, Petru Eles, Zebo Peng
    8th IEEE Workshop on Embedded Systems for Real-Time Multimedia, Scottsdale, AZ, USA, October 28-29, 2010.
  110. Thermal Aware Test Scheduling for Stacked Multi-Chip-Modules
    Vinay N.S., Indira Rawat, M.S. Gaur, Erik Larsson, Virendra Singh
    IEEE East-West Design & Test Symposium (EWDTS10), St. Petersburg, Russia, September 17-20, 2010.
  111. Efficient Embedding of Deterministic Test Data
    Mudassar Majeed, Daniel Ahlström, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    19th IEEE Asian Test Symposium (ATS10), Shanghai, China, December 1-4, 2010.
  112. Test Time Analysis for IEEE P1687
    Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    19th IEEE Asian Test Symposium (ATS10), Shanghai, China, December 1-4, 2010.
  113. Test Scheduling of Modular System-on-Chip under Capture Power Constraint
    Jaynarayan Tudu, Erik Larsson, Virendra Singh
    Workshop on RTL ATPG & DFT (WRTLT10), Shanghai, China, December 2010.
  114. Checking Pipelined Distributed Global Properties for Post-silicon Debug
    Erik Larsson, Bart Vermeulen, Kees Goossens
    Workshop on RTL ATPG & DFT (WRTLT10), Shanghai, China, December 2010.
  115. Temperature-Aware SoC Test Scheduling Considering Inter-Chip Process Variation
    Nima Aghaee, Zhiyuan He, Zebo Peng, Petru Eles
    19th IEEE Asian Test Symposium (ATS10), Shanghai, China, December 1-4, 2010.
  116. Scheduling for Fault-Tolerant Communication on the Static Segment of FlexRay
    Bogdan Tanasa, Unmesh D. Bordoloi, Petru Eles, Zebo Peng
    31st IEEE Real-Time Systems Symposium (RTSS10), San Diego, CA, USA, November 30-December 3, 2010.
  117. Exploiting GPU On-Chip Shared Memory for Accelerating Schedulability Analysis
    Swaroop Nunna, Unmesh D. Bordoloi, Samarjit Chakraborty, Petru Eles, Zebo Peng
    International Symposium on Electronic System Design (ISED10), Bhubaneswar, India, December 2010.
  118. Design Space Exploration of Instruction Set Customizable MPSoCs for Multimedia Applications
    Unmesh D. Bordoloi, Huynh P. Huynh, Tulika Mitra, Samarjit Chakraborty
    International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS10), Greece, July 2010, pp. 170-177.
  119. Dynamic Scheduling and Control-Quality Optimization of Self-Triggered Control Applications
    Soheil Samii, Petru Eles, Zebo Peng, Paulo Tabuada, Anton Cervin
    31st IEEE Real-Time Systems Symposium (RTSS10), San Diego, CA, USA, November 30-December 3, 2010.
  120. Temperature Aware and Defect-Probability Driven Test Scheduling for System-on-Chip
    Zhiyuan He
    PhD Thesis No. 1321, Dept. of Computer and Information Science, Linköping University, June 2010 (Opponent: Professor Matteo Sonza Reorda, Politecnico di Torino, Italy).
  121. Hardware/Software Optimization of Error Detection Implementation for Real-Time Embedded Systems
    Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izosimov
    International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2010), Scottsdale, AZ, USA, October 24-29, 2010.
  122. Low Overhead Dynamic QoS Optimization Under Variable Task Execution Times
    Sergiu Rafiliu, Petru Eles, Zebo Peng
    16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2010), Macau SAR, P.R.C., August 23-25, 2010.
  123. Vdd-Aware Model for the Voltage on Bridged Nodes
    Urban Ingelsson
    Workshop track of the IEEE European Test Symposium (ETS 2010), Prague, Czech Republic, May 24-28, 2010
  124. Predictable Multiprocessor Systems
    Jakob Rosén, Alexandru Andrei, Petru Eles, Zebo Peng
    Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)
  125. Efficient Embedding of Deterministic Test Data
    Mudassar Majeed, Daniel Ahlström, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
    Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)
  126. Scheduling Tests for Stacked 3D Chips under Power Constraints
    Breeta SenGupta, Urban Ingelsson, Erik Larsson
    Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)
  127. Mapping and Scheduling of Jobs in Homogeneous NoC-based MPSoC
    Dimitar Nikolov, Erik Karlsson, Urban Ingelsson, Virendra Singh, Erik Larsson
    Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)
  128. Vdd-Aware Bridge Defect Model
    Urban Ingelsson
    Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)
  129. Checking Pipelined Distributed and Global Properties at Post-silicon Debug
    Erik Larsson, Bart Vermeulen, Kees Goossens
    DAC Workshop on Diagnostic Services in Network-on-Chips (DSNoC'10) , Anaheim, CA, USA, June 13-18, 2010.
  130. Energy-Efficient Fault Tolerance in Chip Multiprocessors Using Critical Value Forwarding
    Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
    The 40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'10), Fairmont Chicago, Millennium Park, Chicago, Illinois, USA, June 28-July 1, 2010, pp. 121-130.
  131. Energy-Efficient Redundant Execution for Chip Multiprocessors
    Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
    Great Lakes Symposium on VLSI on (GLSVLSI'10), Rhode Island, USA, May 16-18, 2010, pp. 143-146.
  132. A Distributed Architecture to Check Global Properties for Post-Silicon Debug
    Erik Larsson, Bart Vermeulen, Kees Goossens
    IEEE European Test Symposium (ETS'10), Prague, Czech Republic, May 24-28, 2010.
  133. Scan Cells Reordering to Minimize Peak Power During Test Cycle: A Graph Theoretic Approach
    Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara
    IEEE European Test Symposium (ETS'10), Prague, Czech Republic, May 24-28, 2010.
  134. Graph Theoretic Approach for Scan Cell Reordering to Minimize Peak Shift Power
    Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara
    Great Lakes Symposium on VLSI (GLSVLSI'10), Rhode Island, USA, May 16-18, 2010, pp. 73-78.
  135. Equation-Based Vdd-Aware Model for Resistive Bridge Behavior
    Urban Ingelsson
    IEEE International Workshop on Realiability Aware System Design and Test (RASDAT 2010), Bangalore, India, January 7-8, 2010, pp. 34-39.
  136. On-line Techniques to Adjust and Optimize Checkpointing Frequency
    Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson
    IEEE International Workshop on Realiability Aware System Design and Test (RASDAT 2010), Bangalore, India, January 7-8, 2010, pp. 29-33.
  137. Multiplexed Redundant Execution: A Technique for Efficient Fault Tolerance in Chip Multiprocessors
    Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
    Design Automation and Test in Europe (DATE), Dresden, Germany, March 8-12, 2010, pp. 1572-1577.
  138. Scheduling and Optimization of Fault-Tolerant Distributed Embedded Systems
    Viacheslav Izosimov
    PhD Thesis No. 1290, Dept. of Computer and Information Science, Linköping University, December 2009.
    Received the Outstanding PhD Dissertations Award for 2011, given by the European Design and Automation Association (EDAA).

    Opponent: Professor Krishnendu Chakrabarty, Duke University, USA.
  139. Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints
    Alexandru Andrei, Petru Eles, Olivera Jovanovic, Marcus Schmitz, Jens Ogniweski, Zebo Peng
    IEEE Trans. on Very Large Scale Integration (VLSI) Systems, Volume 19, Issue 1, Jan. 2011, pp. 10-23.
  140. Estimating Error-Probability and Its Application for Optimizing Roll-back Recovery with Checkpointing
    Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson
    5th IEEE Intl. Symposium on Electronic Design, Test & Applications (DELTA 2010), Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 281-285.
  141. Multi-Temperature Testing for Core-based System-on-Chip
    Zhiyuan He, Zebo Peng, Petru Eles
    Design Automation and Test in Europe (DATE'2010), Dresden, Germany, March 8-12, 2010, pp. 208-213.
  142. Temperature-Aware Idle Time Distribution for Energy Optimization with Dynamic Voltage Scaling
    Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
    Design Automation and Test in Europe (DATE'2010), Dresden, Germany, March 8-12, 2010, pp. 21-26.
  143. An Energy Efficient Technique for Temperature-Aware Voltage Selection
    Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
    Technical reports in Computer and Information Science, ISSN 1654-7233, 2009.
  144. Scan Cell Reordering to Minimize Peak Power during Scan Testing of SoC
    Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara
    10th IEEE Workshop on RTL and High Level Testing (WRTLT'09), Hongkong, China, November 27-28, 2009, pp. 43-48.
  145. An Even-Odd DFD Technique for Scan Chain Diagnosis
    Venkat Rajesh, Erik Larsson, Manoj S. Gaur, Virendra Singh
    Workshop on RTL and High Level Testing (WRTLT), Hongkong, China, November 27-28, 2009.
  146. On Scan Chain Diagnosis for Intermittent Faults
    Dan Adolfsson, Joanna Siew, Erik Jan Marinissen, Erik Larsson
    IEEE Asian Test Symposium (ATS), Taichung, Taiwan, November 23-26, 2009, pp. 47-54.
  147. Generation of Minimal Leakage Input Vectors with Constrained NBTI Degradation
    Pramod Subramanyan, Ram Rakesh Jangir, Jaynarayan Tudu, Erik Larsson, Virendra Singh
    7th IEEE East-West Design & Test Symposium (EWDTS), Moscow, Russia, September 18-21, 2009, pp. 1-4.
  148. Power Efficient Redundant Execution for Chip Multiprocessors
    Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
    Workshop on Dependable and Secure Nanocomputing, Lisbon, Portugal, June 29, 2009, Paper 9, pp. 1-6.
  149. Deterministic Scan-Chain Diagnosis for Intermittent Faults
    Dan Adolfsson, Joanna Siew, Erik Larsson, Erik Jan Marinissen
    European Test Symposium (ETS 2009), Sevilla, Spain, May 25-29, 2009 (Poster).
  150. Capture Power Reduction for Modular System-on-Chip Test
    Jaynarayan T Tudu, Erik Larsson, Virendra Singh, Adit Singh
    IEEE/VSI VLSI Design and Test Symposium (VDAT), Bangalore, India, July 8-10, 2009.
  151. Analyse und Optimierung von fehlertoleranten Eingebetteten Systemen mit gehärteten Prozessoren
    Viacheslav Izosimov, Ilia Polian, Paul Pop, Petru Eles, Zebo Peng
    Zuverlässigkeit und Entwurf (ZUE), Stuttgart, Germany, September 21-23, 2009.
  152. On Minimization of Peak Power for Scan Circuit during Test
    Jaynarayan T Tudu, Erik Larsson, Virendra Singh, Vishwani Agrawal
    European Test Symposium (ETS 2009), Sevilla, Spain, May 25-29, 2009, pp. 25-30.
  153. Power-Aware System-Level DfT and Test Planning
    Erik Larsson, C.P. Ravikumar
    Book Chapter in "Power-Aware Testing and Test Strategies for Low Power Devices", Editors: Patrick Girard, Nicola Nicolici, Xiaoqing Wen, ISBN 978-1-4419-0927-5, Springer, 2009
  154. A Standby-Sparing Technique with Low Energy-Overhead for Fault-Tolerant Hard Real-Time Systems
    Alireza Ejlali, Bashir Al-Hashimi, Petru Eles
    Intl. Conference on Hardware-Software Co-Design and System Synthesis (CODES/ISSS), Grenoble, France, October 11-16, 2009, pp. 193-202 (best paper award).
  155. Immune Genetic Algorithms for Optimization of Task Priorities and FlexRay Frame Identifiers
    Soheil Samii, Yanfei Yin, Zebo Peng, Petru Eles, Yuanping Zhang
    Intl. Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Beijing, China, August 24-26, 2009, pp. 486-493.
  156. Thermal-Aware Test Scheduling for Core-based SoC in an Abort-on-First-Fail Test Environment
    Zhiyuan He, Zebo Peng, Petru Eles
    12th EUROMICRO Conference on Digital System Design (DSD), Patras, Greece, August 27-29, 2009, pp. 239-246.
  157. On-line Thermal Aware Dynamic Voltage Scaling for Energy Optimization with Frequency/Temperature Dependency Consideration
    Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
    Design Automation Conference (DAC), San Fransisco, California, USA, July 26-31, 2009, pp. 490-495.
  158. Quality-Driven Synthesis of Embedded Multi-Mode Control Systems
    Soheil Samii, Petru Eles, Zebo Peng, Anton Cervin
    Design Automation Conference (DAC), San Fransisco, California, USA, July 26-31, 2009, pp. 864-869.
  159. Analysis and Optimization of Fault-Tolerant Embedded Systems with Hardened Processors
    Viacheslav Izosimov, Ilia Polian, Paul Pop, Petru Eles, Zebo Peng
    Design Automation and Test in Europe (DATE 2009), Nice, France, April 20-24, 2009, pp. 682-687.
  160. Integrated Scheduling and Synthesis of Control Applications on Distributed Embedded Systems
    Soheil Samii, Anton Cervin, Petru Eles, Zebo Peng
    Design Automation and Test in Europe (DATE 2009), Nice, France, April 20-24, 2009, pp. 57-62.
  161. Thermal Aware Test Scheduling for Stacked Multi-Chip-Modules
    Vinay N. S., Erik Larsson, Virendra Singh
    DATE 2009 Friday Workshop on 3D Integration - Technology, Architecture, Design, Automation, and Test, Nice, France, April 20-24, 2009.
  162. Fault-Tolerant Average Execution Time Optimization for System-On-Chips
    Mikael Väyrynen, Virendra Singh, Erik Larsson
    Frontiers of High Performance Embedded Computing, Bangalore, India, January, 2009.
  163. Fault-Tolerant Average Execution Time Optimization for General-Purpose Multi-Processor System-on-Chips
    Mikael Väyrynen, Virendra Singh, Erik Larsson
    Design Automation and Test in Europe (DATE 2009), Nice, France, April 20-24, 2009, pp. 484-489.
  164. Test Optimization for Core-based System-on-Chip
    Anders Larsson
    PhD Thesis No. 1222, Dept. of Computer and Information Science, Linköping University, November 2008 (Opponent: Dr. Nicola Nicolici, McMaster University, Ontario, Canada).
  165. Scheduling and Optimization of Fault-Tolerant Embedded Systems
    Viacheslav Izosimov
    EDAA Ph.D. Forum, Design Automation and Test in Europe Conference (DATE 2008), Munich, Germany, 2008.
  166. Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms
    Martino Ruggiero, Davide Bertozzi, Luca Benini, Michela Milano, Alexandru Andrei
    IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Volume 28, Issue 3, March 2009, pp. 378-391.
  167. Test Response Compression for Diagnosis in Volume Production
    Michael Söderman, Erik Larsson
    DAC'08 Workshop on Diagnostic Services in Network-on-Chips (DSNOC), Anaheim, CA, USA, June 9, 2008.
  168. SOC Test Optimization with Compression-Technique Selection
    Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty
    A Workshop in Conjunction with the International Test Conference, Santa Clara, CA, USA, October 28-30, 2008 (Informal Digest).
  169. On Reduction of Capture Power for Modular System-on-Chip Test
    Virendra Singh, Erik Larsson
    IEEE Workshop on RTL and High Level Testing (WRTLT'08), Sapporo, JAPAN, November 27-28, 2008.
  170. Core-Level Expansion of Compressed Test Patterns
    Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty
    17th Asian Test Symposium (ATS), Sapporo, JAPAN, November 24-27, 2008, pp. 277-282.
  171. Simulation-Driven Thermal-Safe Test Time Minimization for System-on-Chip
    Zhiyuan He, Zebo Peng, Petru Eles
    17th Asian Test Symposium (ATS), Sapporo, JAPAN, November 24-27, 2008, pp. 283-288.
  172. Transactor-based Formal Verification of Real-time Embedded Systems
    Daniel Karlsson, Petru Eles, Zebo Peng
    In Lecture Notes in Electrical Engineering, Vol. 10, Ed.: E. Villar, Springer.
  173. A Reconfigurable Power Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling
    Erik Larsson, Zebo Peng
    Journal of Electronic Testing: Theory and Application, Vol. 24, Issue 5, October 2008, pp. 497-504.
  174. Design Optimization of Time- and Cost-Constrained Fault-Tolerant Embedded Systems with Checkpointing and Replication
    Paul Pop, Viacheslav Izosimov, Petru Eles, Zebo Peng
    IEEE Trans. on Very Large Scale Integrated (VLSI) Systems Volume 17, Issue 3, March 2009, pp. 389-402.
  175. Synthesis of Fault-Tolerant Embedded Systems
    Petru Eles, Viacheslav Izosimov, Paul Pop, Zebo Peng
    Design, Automation, and Test in Europe (DATE 2008), Munich, Germany, March 10-14, 2008, pp. 1117-1122.
  176. An Architecture for Integrated Test Data Compression and Abort-on-Fail Testing in a Multi-Site Environment
    Erik Larsson
    IET Computers and digital techniques, Vol. 2, Issue 4, July 2008, pp. 275-284(IET Computers & Digital Techniques Premium Award).
  177. Cycle-Accurate Test Power Modeling and its Application to SoC Test Architecture Design and Scheduling
    Soheil Samii, Mikko Selkälä, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng
    IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, Issue 5, May 2008, pp. 973-977.
  178. Model Validation for Embedded Systems Using Formal Method-Aided Simulation
    Daniel Karlsson, Petru Eles, Zebo Peng
    IET Computers & Digital Techniques journal, Vol. 2, Number 6, November 2008, pp. 413-433.
  179. Synthesis of Flexible Fault-Tolerant Schedules with Preemption for Mixed Soft and Hard Real-Time Systems
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    11th EUROMICRO CONFERENCE on DIGITAL SYSTEM DESIGN (DSD 2008), Parma, Italy, 2008.
  180. Scheduling of Fault-Tolerant Embedded Systems with Soft and Hard Timing Constraints
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    Design, Automation, and Test in Europe (DATE 2008), Munich, Germany, March 10-14, 2008, 915-920.
  181. Test methods for crosstalk-induced delay and glitch faults in network-on-chip interconnects implementing asynchronous communication protocols
    T. Bengtsson, S. Kumar, R.J. Ubar, A. Jutman, Zebo Peng
    IET COMPUTERS AND DIGITAL TECHNIQUES, ISSN 1751-8601, 2 (6), 2008, pp. 445-460.
  182. Challenges and solutions for thermal-aware SOC testing
    Zebo Peng, Zhiyuan He, Petru Eles
    Informacije midem (ISSN 0352-9045), 37 (4), 2007, pp. 220-227.
  183. Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns
    Anders Larsson, Erik Larsson, Krishnendu Chakrabarty, Petru Eles, Zebo Peng
    Design, Automation, and Test in Europe (DATE 2008), Munich, Germany, March 10-14, 2008, 188- 193.
  184. A Simulation Methodology for Worst-Case Response Time Estimation of Distributed Real-Time Systems
    Soheil Samii, Sergiu Rafiliu, Petru Eles, Zebo Peng
    Design, Automation, and Test in Europe (DATE 2008), Munich, Germany, March 10-14, 2008, pp. 556-561.
  185. Temperature-Aware Voltage Selection for Energy Optimization
    Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
    Design, Automation, and Test in Europe (DATE 2008), Interactive Presentation (Work-In-Progress), Munich, Germany, March 10-14, 2008, pp. 1083-1086.
  186. Temperature-Aware Task Mapping for Energy Optimization with Dynamic Voltage Scaling
    Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
    The IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS'08), Bratislava, Slovakia, April 16-18, 2008, pp. 44-49.
  187. Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems
    Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alex Doboli, Paul Pop
    Book Chapter in "The Most Influential Papers of 10 Years DATE", Editors: Rudy Lauwereins and Jan Madsen, ISBN 978-1-4020-6487-6, Springer, 2008
  188. An Integrated System-on-Chip Test Framework
    Erik Larsson, Zebo Peng
    Book Chapter in "The Most Influential Papers of 10 Years DATE", Editors: Rudy Lauwereins and Jan Madsen, ISBN 978-1-4020-6487-6, Springer, 2008
  189. Protocol Requirements in an SJTAG/IJTAG Environment
    Erik Larsson, Gunnar Carlsson, Johan Holmqvist
    Nordic Test Forum (NTF), November 2007, Snekkersten, Denmark.
  190. Energy Efficient and Predictable Design of Real-Time Embedded Systems
    Alexandru Andrei
    PhD Thesis No. 1127, Dept. of Computer and Information Science, Linköping University, October 2007 (Opponent: Prof. Lothar Thiele, Swiss Federal Institute of Technology (ETH) Zurich, Switzerland).
  191. Voltage Selection for Time-Constrained Multiprocessor Systems on Chip
    Alexandru Andrei, Petru Eles, Zebo Peng, Marcus Schmitz, Bashir Al-Hashimi
    Book Chapter in "Designing Embedded Processors: A Low Power Perspective", Editors: J. Henkel, S. Parameswaran, Springer, ISBN 978-1-4020-5868-4, 2007
  192. Predictable Implementation of Real-Time Applications on Multiprocessor Systems on Chip
    Alexandru Andrei, Petru Eles, Zebo Peng, Jakob Rosén
    21st Intl. Conference on VLSI Design, January 4-8, 2008, Hyderabad, India, pp. 103-110.
  193. Timing Analysis of the FlexRay Communication Protocol
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng, Alexandru Andrei
    Real-Time Systems Journal, Volume 39, Numbers 1-3, August, 2008, pp 205-235.
  194. Analysis and Optimisation of Hierarchically Scheduled Multiprocessor Embedded Systems
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng
    Intl. Journal of Parallel Programming, Special Issue on Multiprocessor-based Embedded Systems, Volume 36, Number 1, February, 2008, pp. 37-67.
  195. Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
    Jakob Rosén, Alexandru Andrei, Petru Eles, Zebo Peng
    28th IEEE Real-Time Systems Symposium (RTSS'07), December 3-6, 2007, Tucson, Arizona, USA, pp. 49-60.
  196. Timing Analysis for the FlexRay Communication Protocol
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng, Alexandru Andrei
    Real-Time in Sweden, August 21-22, 2007, Västerås, Sweden
  197. Transactor-based Formal Verification of Real-time Embedded Systems
    Daniel Karlsson, Petru Eles, Zebo Peng
    Forum on Specification & Design Languages (FDL), Barcelona, Spain, September 18-20, 2007.
  198. Slack-Time Aware Dynamic Routing Schemes for On-Chip Networks
    Daniel Andreasson
    Licentiate Thesis No. 1303, Dept. of Computer and Information Science, Linköping University, August 2007
  199. System-on-Chip Test Scheduling with Defect-Probability and Temperature Considerations
    Zhiyuan He
    Licentiate Thesis No. 1313, Dept. of Computer and Information Science, Linköping University, June 2007
  200. Scheduling and Voltage Scaling for Energy/Reliability Trade-offs in Fault-Tolerant Time-Triggered Embedded Systems
    Paul Pop, Kare Poulsen, Viacheslav Izosimov, Petru Eles
    5th Intl. Conf. on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Salzburg, Austria, September 30 - October 5, 2007, pp. 233-238.
  201. A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems
    Kare Poulsen, Paul Pop, Viacheslav Izosimov
    12th IEEE Conf. on Emerging Technologies and Factory Automation (ETFA), Work-In-Progress Section, Patras, Greece, September 25-28, 2007, pp. 756-759.
  202. Energy-Aware Synthesis of Fault-Tolerant Schedules for Real-Time Distributed Embedded Systems
    Kare Poulsen, Paul Pop, Viacheslav Izosimov
    19th Euromicro Conference on Real-Time Systems (ECRTS), Work-In-Progress Section, Pisa, Italy, July 4-6, 2007, pp. 21-24.
  203. Protocol Requirements in an SJTAG/IJTAG Environment
    Gunnar Carlsson, Johan Holmqvist, Erik Larsson
    International Test Conference (ITC), Santa Clara, USA, October 21-26, 2007, Lecture 1.3 (pp. 1-9).
  204. What Impacts Course Evaluation?
    Erik Larsson, Medhi Amirijoo, Daniel Karlsson, Petru Eles
    12th SIGCSE Conf. on Innovation and Technology in Computer Science Education, Dundee, Scotland, UK, June 25-27, 2007, pp. 333-333.
  205. An Architecture for Combined Test Data Compression and Abort-on-Fail Test
    Erik Larsson, Jon Persson
    Asia and South Pacific Design Automation Conf. (ASP-DAC'07), Yokohama, Japan, January 23-26, 2007, pp. 726-731.
  206. Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO
    Tobias Dubois, Erik-Jan Marinissen, Mohamed Azimane, Paul Wielage, Erik Larsson, Clemens Wouters
    Design, Automation, and Test in Europe (DATE), Nice, France, April 16-20, 2007, pp. 859-864.
  207. Test Data Truncation for Test Quality Maximisation under ATE Memory Depth Constraint
    Erik Larsson, Stina Edbom
    Journal on Computers & Digital Techniques, IET, Vol.1, Iss.1, January 2007, pp. 27-37.
  208. Improved Scan Chain Diagnosis
    Erik-Jan Marinissen, Dan Adolfsson, Erik Larsson, Sandeep-Kumar Goel
    15th NXP IC Test Symposium (NITS'07), Eindhoven, The Netherlands, June 11, 2007 (Informal Digest)
  209. Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
    Zhiyuan He, Zebo Peng, Petru Eles, Paul Rosinger, Bashir M. Al-Hashimi
    Journal of Electronic Testing; Theory and Applications (JETTA), Special Issue on DFT 2006, Vol. 24, Numbers 1-3, June 2008, pp. 247-257.
  210. A Heuristic for Thermal-Safe SoC Test Scheduling
    Zhiyuan He, Zebo Peng, Petru Eles
    International Test Conference (ITC), Santa Clara, USA, October 21-26, 2007, Lecture 5.2 (pp. 1-10)
  211. Analysis and Optimisation of Distributed Embedded Systems with Heterogeneous Scheduling Policies
    Traian Pop
    PhD Thesis No. 1089, Dept. of Computer and Information Science, Linköping University, June 2007 (Opponent: Prof. Luis Almeida, Universidade de Aveiro, Campo Universitario, Aveiro, Portugal).
  212. Extended STAPL as SJTAG Engine
    Johan Holmqvist, Gunnar Carlsson, Erik Larsson
    IEEE European Test Symposium, Freiburg, Germany, May, 2007, pp. 119-124.
  213. A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS'07), Krakow, Poland, April 2007, pp. 61-66.
  214. Real-Time Applications with Stochastic Task Execution Times
    Sorin Manolache, Petru Eles, Zebo Peng
    Springer, ISBN 1-4020-5505-6, 2007
  215. Bus Access Optimisation for FlexRay-based Distributed Embedded Systems
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng
    Design, Automation, and Test in Europe Conference (DATE'07), Nice, France, April 2007, pp. 51-62
  216. Optimized Integration of Test Compression and Sharing for SOC Testing
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    Design, Automation, and Test in Europe Conference (DATE'07), Nice, France, April 2007, pp. 207-212.
  217. Scheduling and Optimization of Fault-Tolerant Embedded Systems
    Viacheslav Izosimov
    Licentiate Thesis No. 1277, Dept. of Computer and Information Science, Linköping University, November 2006
  218. Verification of Component-based Embedded System Designs
    Daniel Karlsson
    Ph. D. Thesis No. 1017, Dept. of Computer and Information Science, Linköping University, June 2006 (Opponent: Prof. Bashir Al-Hashimi, University of Southampton, UK)
  219. Fault-Aware Communication Mapping for NoCs with Guaranteed Latency
    Sorin Manolache, Petru Eles, Zebo Peng
    Intl. Journal of Parallel Programming, Volume 35, Number 2, April 2007, pp. 125-156.
  220. A Cooperative, Accurate Solving Framework for Optimal Allocation, Scheduling and Frequency Selection on Energy-Efficient MPSoCs
    Martino Ruggiero, Pari Gioia, Guerri Alessio, Luca Benini , Michela Milano, Davide Bertozzi, Alexandru Andrei
    International Symposium on System-on-Chip (SOC06), Tampere, Finland, November 13-16, 2006
  221. Energy Optimization of Multiprocessor Systems on Chip by Voltage Selection
    Alexandru Andrei, Petru Eles, Zebo Peng, Marcus Schmitz, Bashir Al-Hashimi
    IEEE Trans. on Very Large Scale Integration Systems (VLSI), Volume 15, Issue 3, March 2007, pp. 262-275.
  222. Hybrid BIST Energy Minimisation Technique for System-on-Chip Testing
    Gert Jervan, Raimund Ubar, Tatjana Shchenova, Zebo Peng
    IEE Proceedings - Computers and Digital Techniques, Vol. 153 , Issue 4, July 2006, pp. 208-216
  223. Hybrid BIST Methodology for Testing Core-Based Systems
    Gert Jervan, Raimund Ubar, Zebo Peng
    Proceedings of the Estonian Academy of Sciences. Engineering, Vol. 12, No. 3-2, September 2006, pp. 300–322
  224. Combined Test Data Compression and Abort-on-Fail Test
    Erik Larsson
    24th Norchip Conference, Linkoping, Sweden, November 20-21, 2006
  225. Test Time Minimization for Hybrid BIST of Core-Based Systems
    Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin
    Journal of Computer Science and Technology, Vol. 21, No. 6, November 2006, pp. 907-912
  226. Task Mapping and Priority Assignment for Soft Real-Time Applications under Deadline Miss Ratio Constraints
    Sorin Manolache, Petru Eles, Zebo Peng
    ACM Trans. on Embedded Computing Systems, Volume 7, Number 2, pp. 1-35, February 2008.
  227. Formal Verification of Component-based Designs
    Daniel Karlsson, Petru Eles, Zebo Peng
    Journal of Design Automation for Embedded Systems, Vol. 11, No. 1, March 2007, pp. 49-90
  228. High-Quality Low-Cost Test and DfT for an Embedded Asynchronous FIFO
    Tobias Dubois, Mohamed Azimane, Erik Larsson, Erik-Jan Marinissen, Paul Wielage, Clemens Wouters
    14th Philips Research IC Test Seminar (PRITS), Eindhoven, The Netherlands, June 27, 2006
  229. System-on-Chip Test Scheduling with Reconfigurable Core Wrappers
    Erik Larsson, Hideo Fujiwara
    IEEE Trans. on Very Large Scale Integration Systems (VLSI) Systems, Vol. 14, No. 3, March 2006, pp. 305-309
  230. Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
    Erik Larsson, Stina Edbom
    Book Chapter in "Vlsi-Soc: From Systems To Silicon" (Editors: Ricardo Reis, Adam Osseiran, Hans-Joerg Pfleiderer), IFIP International Federation for Information Processing 240/2007, ISBN: 978-0-387-73660-0, Springer, 2007.
  231. Quasi-Static Assignment of Voltages and Optional Cycles in Imprecise-Computation Systems with Energy Considerations
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    IEEE Trans. on Very Large Scale Integration Systems, Vol. 14, Issue 10, October 2006, pp. 1117-1129
  232. Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
    Zhiyuan He, Zebo Peng, Petru Eles, Paul Rosinger, Bashir M. Al-Hashimi
    International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'06), Arlington, Virginia, USA, October 4-6, 2006, pp. 477-485
  233. Cycle-Accurate Test Power Modeling and its Application to SoC Test Scheduling
    Soheil Samii, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng
    International Test Conference (ITC'06), Santa Clara, California, USA, October 24-26, 2006, pp. 32.1 (1-10)
  234. Dual Flow Nets: Modeling the Control/Data-flow Relation in Embedded Systems
    Mauricio Varea, Bashir M. Al-Hashimi, Luis A. Cortés, Petru Eles, Zebo Peng
    ACM Transactions on Embedded Computing Systems (TECS), Vol. 5, Issue 1, February 2006, pp 54-81
  235. Analysis and Optimization of Distributed Real-Time Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng, Traian Pop
    ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 11, Issue 3, July 2006, pp. 593-625
  236. Off-line Testing of Delay Faults in NoC Interconnects
    Tomas Bengtsson, Artur Jutman, Shashi Kumar, Raimund Ubar, Zebo Peng
    9th Euromicro Conference on Digital System Design (DSD 2006), Cavtat near Dubrovnik, Croatia, August 30 - September 1, 2006, pp. 677-680
  237. Mapping of Fault-Tolerant Applications with Transparency on Distributed Embedded Systems
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    9th Euromicro Conference on Digital System Design (DSD 2006), Cavtat near Dubrovnik, Croatia, August 30 - September 1, 2006, pp. 313-320
  238. Timing Analysis of the FlexRay Communication Protocol
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng, Alexandru Andrei
    18th Euromicro Conference on Real-Time Systems (ECRTS 06), Dresden, Germany, July 5-7, 2006, pp. 203-213
  239. SOC Test Scheduling with Test Set Sharing and Broadcasting
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'06), Kolmården, Sweden, May 4-5, 2006 (Informal Digest)
  240. Power Constrained and Defect-Probability Driven SoC Test Scheduling with Test Set Partitioning
    Zhiyuan He, Zebo Peng, Petru Eles
    Swedish System-on-Chip Conference (SSoCC'06), Kolmården, Sweden, May 4-5, 2006 (Informal Digest)
  241. Optimization of Fault-Tolerant Applications on Distributed Embedded Systems
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'06), Kolmården, Sweden, May 4-5, 2006 (Informal Digest)
  242. Analysis and Optimisation of Heterogeneous Real-Time Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Chapter in System On Chip: Next Generation Electronics, IEE Press, ISBN 0-86341-552-0 & 978-086341-552-4, 2006
  243. Schedulability Analysis of Real-Time Systems with Stochastic Task Execution Times
    Sorin Manolache, Petru Eles, Zebo Peng
    Chapter in ARTES - A network for Real-Time research and graduate Education in Sweden 1997-2006, ISBN 91-506-1859-8, 2006
  244. Schedulability-Driven Communication Synthesis for Time Triggered Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Chapter in ARTES - A network for Real-Time research and graduate Education in Sweden 1997-2006, ISBN 91-506-1859-8, 2006
  245. Design Optimization of Multi-Cluster Embedded Systems for Real-Time Applications
    Paul Pop, Petru Eles, Zebo Peng
    Chapter in ARTES - A network for Real-Time research and graduate Education in Sweden 1997-2006, ISBN 91-506-1859-8, 2006
  246. Analysis and Optimisation of Real-Time Systems with Stochastic Behaviour
    Sorin Manolache
    Ph. D. Thesis No. 983, Dept. of Computer and Information Science, Linköping University, December 2005 (Opponent: Prof. Sharon Hu, University of Notre Dame, USA)
  247. System-on-Chip Test Scheduling and Test Infrastructure Design
    Anders Larsson
    Licentiate Thesis No. 1206, Dept. of Computer and Information Science, Linköping University, November 2005
  248. Formal Verification of SystemC Designs Using a Petri-Net based Representation
    Daniel Karlsson, Petru Eles, Zebo Peng
    Design Automation and Test in Europe Conference (DATE 2006), Munich, Germany, March 6-10, 2006, pp. 1228-1233
  249. Synthesis of Fault-Tolerant Schedules with Transparency/Performance Trade-offs for Distributed Embedded Systems
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    Design Automation and Test in Europe Conference (DATE 2006), Munich, Germany, March 6-10, 2006, pp. 706-711
  250. Buffer Space Optimisation with Communication Synthesis and Traffic Shaping for NoCs
    Sorin Manolache, Petru Eles, Zebo Peng
    Design Automation and Test in Europe Conference (DATE 2006), Munich, Germany, March 6-10, 2006, pp. 718-723
  251. Power Constrained and Defect-Probability Driven SoC Test Scheduling with Test Set Partitioning
    Zhiyuan He, Zebo Peng, Petru Eles
    Design Automation and Test in Europe Conference (DATE 2006), Munich, Germany, March 6-10, 2006, pp. 291-296
  252. Synthesis of Fault-Tolerant Embedded Systems with Checkpointing and Replication
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    3rd IEEE Intl. Workshop on Electronic Design, Test & Applications (DELTA), Kuala Lumpur, Malaysia, January 17-19, 2006, pp. 440-447
  253. SOC Test Scheduling with Test Set Sharing and Broadcasting
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    IEEE Asian Test Symposium, Kolkata, India, December 18-21, 2005, pp. 162-167
  254. Introduction to Advanced System-on-Chip Test Design and Optimization
    Erik Larsson
    FRONTIERS IN ELECTRONIC TESTING: Vol.29, Springer, 2005, ISBN: 1-4020-3207-2
  255. Remote Boundary-Scan System Test Control for the ATCA Standard
    David Bäckström, Gunnar Carlsson, Erik Larsson
    International Test Conference (ITC'05), Austin, Texas, USA, November 8-10, 2005
  256. Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
    Erik Larsson, Stina Edbom
    IFIP WG 10.5 Conference on Very Large Scale Integration System-on-Chip (IFIP VLSI-SOC) 2005, Perth, Australia, October 17-19, 2005, pp. 429-434
  257. Multiple Constraints Driven System-on-Chip Test Time Optimization
    Erik Larsson, Julien Pouget, Zebo Peng
    Journal of Electronic Testing; Theory and Applications (JETTA), Volume 21, Number 6, December 2005, pp. 599-611
  258. Abort-on-Fail Based Test Scheduling
    Erik Larsson, Julien Pouget, Zebo Peng
    Journal of Electronic Testing; Theory and Applications (JETTA), Volume 21, Number 6, December 2005, pp. 651-658
  259. Power-Aware Test Planning in the Early System-On-Chip Design Exploration Process
    Erik Larsson, Zebo Peng
    Special Issue-Design and Test of Systems-On-a-Chip, IEEE Transactions on Computers, February 2006, Volume 6, Number 2, pp. 227-239
  260. A Test Data Compression Architecture with Abort-on Fail Capability
    Erik Larsson, Irtiyaz Gilani
    IEEE Workshop on RTL and High Level Testing (WRTLT), Harbin, China, July 20-21, 2005
  261. A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    Journal of Computer Science and Technology, Vol.20, No.2, 2005, pp. 216-223
  262. Hybrid Built-In Self-Test and Test Generation Techniques for Digital Systems
    Gert Jervan
    Ph. D. Thesis No. 945, Dept. of Computer and Information Science, Linköping University, May 2005 (Opponent: Prof. Joao Paulo Teixeira, IST/INSESC-ID, Portugal)
  263. High-Level Techniques for Built-In Self-Test Resources Optimization
    Abdil Rashid Mohamed
    Licentiate Thesis No. 1156, Dept. of Computer and Information Science, Linköping University, April 2005
  264. Validation of Embedded Systems using Formal Method aided Verification
    Daniel Karlsson, Petru Eles, Zebo Peng
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 196-199
  265. Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 403-409
  266. Power-Composition Profile Driven Co-Synthesis with Power Management Selection for Dynamic and Leakage Energy Reduction
    Dong Wu, Bashir M. Al-Hashimi, Marcus T. Schmitz, Petru Eles
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 34-40
  267. Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment
    Zhiyuan He, Gert Jervan, Petru Eles, Zebo Peng
    8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, August 30 - September 3, 2005, pp. 83-86
  268. Quasi-Static Scheduling for Multiprocessor Real-Time Systems with Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'05), Hong Kong, August 17-19, pp. 422-428
  269. Optimization of Hierarchically Scheduled Heterogeneous Embedded Systems
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng
    11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'05), Hong Kong, August 17-19, pp. 67-71
  270. Boundary-Scan Test Control in the ATCA Standard
    David Bäckström, Gunnar Carlsson, Erik Larsson
    IEEE European Board Test Workshop, EBTW, Tallinn, Estonia, 25-26 May 2005
  271. Test Generation: A Hierarchical Approach
    Gert Jervan, Raimund Ubar, Zebo Peng, Petru Eles
    Chapter in System-level Test and Validation of Hardware/Software Systems, Springer Series in Advanced Microelectronics, Vol. 17, ISBN 1-85233-899-7, 2005
  272. An Approach to System-Level DFT
    Gert Jervan, Raimund Ubar, Zebo Peng, Petru Eles
    Chapter in System-level Test and Validation of Hardware/Software Systems, Springer Series in Advanced Microelectronics, Vol. 17, ISBN 1-85233-899-7, 2005
  273. Test Scheduling for Modular SOCs in an Abort-on-Fail Environment
    Urban Ingelsson, Sandeep-Kumar Goel, Erik Larsson, Erik-Jan Marinissen
    IEEE European Test Symposium (ETS'05), Tallinn, Estonia, May 22-25, 2005, pp. 8-13
  274. Distributed Embedded Real-Time Systems: Analysis and Exploration
    Paul Pop, Petru Eles, Zebo Peng
    Chapter in Embedded Systems Design: The ARTIST Roadmap for Research and Development, Lecture Notes in Computer Science, Vol. 3436, ISBN 3-540-25107-3, 2005
  275. Automotive Industry
    Paul Pop, Rolf Ernst, Petru Eles, Zebo Peng
  276. Quasi-Static Assignment of Voltages and Optional Cycles for Maximizing Rewards in Real-Time Systems with Energy Constraints
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    42nd Design Automation Conference, Anaheim, CA, June 13-17, 2005, pp. 889-894
  277. Verification and Scheduling Techniques for Real-Time Embedded Systems
    Luis Alejandro Cortes
    Ph. D. Thesis No. 920, Dept. of Computer and Information Science, Linköping University, March 2005 (Opponent: Prof. Franco Fummi, Universita di Verona, Italy)
  278. Fault and EnergyAware Communication Mapping with Guaranteed Latency for Applications Implemented on NoC
    Sorin Manolache, Petru Eles, Zebo Peng
    42nd Design Automation Conference, Anaheim, CA, June 13-17, 2005, pp. 266-269
  279. Energy Minimization for Hybrid BIST in a System-on-Chip Test Environment
    Gert Jervan, Raimund Ubar, Tatjana Shchenova, Zebo Peng
    10th IEEE European Test Symposium (ETS'05) Tallinn, Estonia, May 22-25, 2005, pp. 2-7
  280. An Improved Estimation Technique for Hybrid BIST Test Set Generation
    Gert Jervan, Zebo Peng, Raimund Ubar, Olga Korelina
    IEEE Workshop on Design and Diagnostics of Electronic Circuit and Systems (DDECS), Sopron, Hungary, April 13-16, 2005, pp. 182-185
  281. Cosynthesis of Energy-Efficient Multimode Embedded Systems With Consideration of Mode-Execution Probabilities
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 24, Issue 2, Feb. 2005, pp. 153-169
  282. Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems
    Alexandru Andrei, Marcus Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
    IEE Proceedings Computers & Digital Techniques, special issue with the best contributions from the DATE 2004, Volume 152, Issue 01, January 2005, pp. 28-38
  283. Optimization of Hierarchically Scheduled Heterogeneous Embedded Systems
    Traian Pop, Paul Pop, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)
  284. A Constraint Logic Programming Approach to SOC Test Scheduling
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)
  285. Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment
    Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)
  286. Validation of Embedded Systems using Formal Method aided Simulation
    Daniel Karlsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'05), Tammsvik, Stockholm, Sweden, April 18-19, 2005 (Informal Digest)
  287. Analysis and Synthesis of Distributed Real-Time Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Kluwer Academic Publishers (now part of Springer-Verlag), ISBN: 1-4020-2872-5, 2004, XXII, 326 p.
  288. Design Optimization of Time- and Cost-Constrained Fault-Tolerant Distributed Embedded Systems
    Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    Design Automation and Test in Europe Conference (DATE 2005), Munich, Germany, March 7-11, 2005, pp. 864-869 (best paper award)
  289. Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints
    Alexandru Andrei, Marcus Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
    Design Automation and Test in Europe Conference (DATE 2005), Munich, Germany, March 7-11, 2005, pp. 514-519
  290. Schedulability-Driven Frame Packing for Multi-Cluster Distributed Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    ACM Transactions on Embedded Computing Systems, Vol. 4, No. 1, February 2005, pp. 112-140
  291. An Integrated Technique for Test Vector Selection and Test Scheduling under Test Time Constraint
    Stina Edbom, Erik Larsson
    2004 IEEE Asian Test Symposium (ATS 2004), Kenting, Taiwan, November 15-17, 2004, pp. 254-257
  292. Hybrid BIST Test Scheduling Based on Defect Probabilities
    Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
    2004 IEEE Asian Test Symposium (ATS 2004), Kenting, Taiwan, November 15-17, 2004, pp. 230-235
  293. An Improved Estimation Methodology for Hybrid BIST Cost Calculation
    Gert Jervan, Zebo Peng, Raimund Ubar, Olga Korelina
    IEEE Norchip 2004, Oslo, Norway, November 8-9, 2004, pp. 297-300
  294. Simultaneous Communication and Processor Voltage Scaling for Dynamic and Leakage Energy Reduction in Time-Constrained Systems
    Alexandru Andrei, Marcus Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
    International Conference on Computer Aided Design (ICCAD 2004), San Jose, USA, November 7-11, 2004, pp. 362-269.
  295. Integrating Core Selection in the SOC Test Solution Design-Flow
    Erik Larsson
    International Test conference (ITC'04), Charlotte, NC, USA, October 2004, pp. 1349-1358
  296. A Formal Verification Approach for IP-based Designs
    Daniel Karlsson, Petru Eles, Zebo Peng
    Forum on Specification and Design Languages, Lille, France, September 13-17, 2004, pp. 556-567
  297. A Formal Verification Methodology for IP-based Designs
    Daniel Karlsson, Petru Eles, Zebo Peng
    EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, Architectures, Methods and Tools, Rennes, France, August 31-September 3, 2004, pp 372-379.
  298. A Heuristic for Wiring-Aware Built-In Self-Test Synthesis
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, Architectures, Methods and Tools, Rennes, France, August 31-September 3, 2004, pp. 408 - 415
  299. Combining Static and Dynamic Scheduling for Real-Time Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Workshop on Software Analysis and Development for Pervasive Systems (SONDA 2004), Invited Paper, Verona, Italy, August 24, 2004, pp. 32-40.
  300. Student-oriented Examination in a Computer Architecture Course
    Erik Larsson, Anders Larsson
    9th Annual Conference on Innovation and Technology in Computer Science Education, Leeds, UK, June 28-30, 2004, pp 245.
  301. Schedulability Analysis of Applications with Stochastic Task Execution Times
    Sorin Manolache, Petru Eles, Zebo Peng
    ACM Transactions on Embedded Computing Systems (TECS), Vol. 3, No. 4, November 2004, pp. 706-735
  302. A Technique for Optimization of System-on-Chip Test Data Transportation
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    9th IEEE European Test Symposium, Corsica, France, May 23-26, 2004, pp. 179-180. (Informal Digest)
  303. Optimization of Soft Real-Time Systems with Deadline Miss Ratio Constraints
    Sorin Manolache, Petru Eles, Zebo Peng
    10th IEEE Real-Time and Embedded Technology and Applications Symposium, Toronto, Canada, May 2004, pp. 562-570.
  304. A Heuristic for Wiring-Aware Built-In Self-Test Synthesis
    Abdil Rashid Mohamed, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)
  305. A Formal Verification Methodology for IP-based Designs
    Daniel Karlsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)
  306. An Iterative Approach to Test Time Minimization for Parallel Hybrid BIST Architecture
    Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)
  307. A Technique for Optimisation of SOC Test Data Transportation
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)
  308. Design Optimization of mixed Time/Event-Triggered Distributed Embedded Systems
    Traian Pop, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference 2004, Båstad, Sweden, April 13-14, 2004 (Informal Digest)
  309. Preemptive System-on-Chip Test Scheduling
    Erik Larsson, Hideo Fujiwara
    IEICE Transactions on Information Systems. Special Issue on Test and Verification of VLSI, Vol. E87-D, No. 3, March 2004, pp.620-629
  310. Core Selection Integrated in the SOC Test Solution Design-Flow
    Erik Larsson
    International Workshop on Test Resource Partitioning (TRP), Napa Valley, USA, April 2004
  311. Defect-Aware SOC Test Scheduling
    Erik Larsson, Julien Pouget, Zebo Peng
    2004 IEEE VLSI Test Symposium (VTS'04), Napa Valley, USA, April 2004, pp. 359-364
  312. Efficient Test Solutions for Core-based Designs
    Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng
    IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, Vol.23, No.5, May 2004, pp. 758-775
  313. An Iterative Approach to Test Time Minimization for Parallel Hybrid BIST Architecture
    Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
    The 5th IEEE Latin-American Test Workshop, Cartagena, Colombia, March 8-10, 2004, pp. 98-103
  314. Design Optimization of Multi-Cluster Embedded Systems for Real-Time Applications
    Paul Pop, Petru Eles, Zebo Peng, Viacheslav Izosimov, Magnus Hellring, Olof Bridal
    Design, Automation and Test in Europe (DATE 2004), Paris, France, February 16-20, 2004, pp. 1028-1033
  315. Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems
    Alexandru Andrei, Marcus Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
    Design, Automation and Test in Europe (DATE 2004), Paris, France, February 16-20, 2004, pp. 518-523
  316. Quasi-Static Scheduling for Real-Time Systems with Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Design, Automation and Test in Europe (DATE 2004), Paris, France, February 16-20, 2004, pp. 1176-1181
  317. Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    The IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), Perth, Australia, January 28-30, 2004, pp. 115-120
  318. Hybrid BIST Optimization for Core-based Systems with Test Pattern Broadcasting
    Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
    The IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), Perth, Australia, January 28-30, 2004, pp. 3-8
  319. A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    The IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), Perth, Australia, January 28-30, 2004, pp. 413-415
  320. Iterative Schedule Optimisation for Voltage scalable Distributed Embedded Systems
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    ACM Transactions on Embedded Computing Systems, Vol. 3, Nr. 1, 2004, pp. 182-217
  321. System-Level Design Techniques for Energy-Efficient Embedded Systems
    Marcus T. Schmitz, Bashir M. Al-Hashimi, Petru Eles
    Kluwer Academic Publishers, ISBN 1-4020-7750-5, December 2003
  322. Towards Formal Verification in a Component-based Reuse Methodology
    Daniel Karlsson
    Licentiate Thesis No. 1058, Dept. of Computer and Information Science, Linköping University, December 2003
  323. Modeling and Formal Verification of Embedded Systems based on a Petri Net Representation
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Journal of Systems Architecture (JSA), Special Issue on System and Circuit Synthesis and Verification, vol. 49, no. 12-15, December 2003, pp. 571-598.
  324. A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    4th Workshop on RTL and High Level Testing (WRTLT'03), Xian, China, November 20-21, 2003
  325. Test Time Minimization for Hybrid BIST of Core-Based Systems
    Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin
    12th IEEE Asian Test Symposium (ATS03), Xian, China, November 17-19, 2003, pp. 318-323
  326. SOC Test Time Minimization Under Multiple Constraints
    Julien Pouget, Erik Larsson, Zebo Peng
    12th IEEE Asian Test Symposium (ATS03), Xian, China, November 17-19, 2003, pp. 312-317
  327. Optimal System-on-Chip Test Scheduling
    Erik Larsson, Hideo Fujiwara
    12th IEEE Asian Test Symposium (ATS03), Xian, China, November 17-19, 2003, pp. 306-311
  328. Test Time Minimization for Hybrid BIST with Test Pattern Broadcasting
    Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng
    The 21st NORCHIP Conference, Riga, Latvia, November 10-11, 2003, pp. 112-116
  329. Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
    Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin
    18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), Cambridge, MA, USA, November 3-5, 2003, pp. 225-232
  330. Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
    Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
    18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), Cambridge, MA, USA, November 3-5, 2003, pp. 385-392
  331. Design Optimization of Mixed Time/Event-Triggered Distributed Embedded Systems
    Traian Pop, Petru Eles, Zebo Peng
    CODES+ISSS 2003 (merged conference), Newport Beach, California, USA, October 1-3, 2003, pp. 83-89.
  332. A Reconfigurable Power-conscious Core Wrapper and its Application to SOC Test Scheduling
    Erik Larsson, Zebo Peng
    International Test Conference (ITC) 2003, Charlotte, NC, USA, September 30 - October 2, 2003, pp. 1135-1144. (Paper 44.2)
  333. Scheduling and Mapping of Conditional Task Graph for the Synthesis of Low Power Embedded Systems
    Dong Wu, Bashir M. Al-Hashimi, Petru Eles
    IEE Proceedings - Computers and Digital Techniques, Vol. 150, Issue 5, September 2003, pp. 303-312
  334. Quasi-Static Scheduling for Real-Time Systems with Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Technical Report, Embedded Systems Lab, Dept. of Computer and Information Science, Linköping University, September 2003.
  335. Schedulability Analysis for Distributed Heterogeneous Time/Event Triggered Real-Time Systems
    Traian Pop, Petru Eles, Zebo Peng
    15th Euromicro Conference on Real-Time Systems (ECRTS 2003), Porto, Portugal, July 2-4, 2003, pp. 257-266
  336. Analysis and Synthesis of Communication-Intensive Heterogeneous Real-Time Systems
    Paul Pop
    Ph. D. Thesis No. 833, Dept. of Computer and Information Science, Linköping University, June 2003 (Opponent: Prof. Rolf Ernst, Technical University of Braunschweig, Germany)
  337. Scheduling and Optimisation of Heterogeneous Time/Event-Triggered Distributed Embedded Systems
    Traian Pop
    Licentiate Thesis No. 1022, Dept. of Computer and Information Science, Linköping University, June 2003
  338. An Efficient Approach to SoC Wrapper Design, TAM Configuration and Test Scheduling
    Julien Pouget, Erik Larsson, Zebo Peng, Marie-Lise Flottes, Bruno Rouzeyre
    IEEE European Test Workshop 2003 (ETW'03), Maastricht, The Netherlands, May 25-28, 2003, pp 51-56 (Formal Proceedings)
  339. An Efficient Approach to SoC Wrapper Design, TAM Configuration and Test Scheduling
    Julien Pouget, Erik Larsson, Zebo Peng, Marie-Lise Flottes, Bruno Rouzeyre
    IEEE European Test Workshop 2003 (ETW'03), Maastricht, The Netherlands, May 25-28, 2003, pp. 117-122 (Informal Proceedings)
  340. Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft Tasks
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Technical Report, Embedded Systems Lab, Dept. of Computer and Information Science, Linköping University, April 2003.
  341. Test Resource Partitioning and Optimization for SOC Designs
    Erik Larsson, Hideo Fujiwara
    2003 IEEE VLSI Test Symposium (VTS'03), Napa Valley, USA, 27 April - 1 May 2003, pp. 319-324
  342. Defect Probability-based System-On-Chip Test Scheduling
    Erik Larsson, Julien Pouget, Zebo Peng
    6th IEEE International Workshop on Design and Diagnostics of Electronics Circuits and Systems (DDECS'03), Poznan, Poland, April 14-16, 2003, pp. 25-32
  343. Automatic Generation of a Formal Verification Bench for a Reuse Methodology
    Daniel Karlsson, Petru Eles, Zebo Peng
    Swedish System-on-Chip Conference (SSoCC'03), Sunbyholms Slott, Eskilstuna, Sweden, April 8-9, 2003 (Informal Digest)
  344. System-on-Chip Test Resource Partitioning and Optimization
    Erik Larsson
    Swedish System-on-Chip Conference (SSoCC'03), Sunbyholms Slott, Eskilstuna, Sweden, April 8-9, 2003 (Informal Digest)
  345. Optimal Test Time for System-on-Chip Designs using Preemptive Scheduling and Reconfigurable Wrappers
    Erik Larsson, Hideo Fujiwara
    Nara Institute of Science and Technology (NAIST), NAIST-IS-TR2002011, Japan, July 2002.
  346. Preemptive Power Constrained TAM Scheduling for Scan-based System-on-Chip
    Erik Larsson, Hideo Fujiwara
    Nara Institute of Science and Technology (NAIST), ISSN 0919-9527, NAIST-IS-TR2002003, Japan, January 2002.
  347. High-Level and Hierarchical Test Sequence Generation
    Gert Jervan, Zebo Peng, Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
    Swedish System-on-Chip Conference (SSoCC'03), Sunbyholms Slott, Eskilstuna, Sweden, April 8-9, 2003 (Informal Digest)
  348. System-on-Chip Test Scheduling based on Defect Probability
    Erik Larsson, Julien Pouget, Zebo Peng
    2003 International Test Synthesis Workshop (ITSW), Santa Barbara, CA, USA, March 31 - April 2, 2003
  349. A Co-Design Methodology for Energy-Efficient Multi-Mode Embedded Systems with Consideration of Mode Execution Probabilities
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    Design Automation and Test in Europe (DATE 2003) Conference, 3-7 March 2003, Munich, Germany, pp. 960-965
  350. Scheduling and Mapping of Conditional Task Graph for the Synthesis of Low Power Embedded Systems
    Dong Wu, Bashir M. Al-Hashimi, Petru Eles
    Design Automation and Test in Europe (DATE 2003) Conference, 3-7 March 2003, Munich, Germany, pp. 90-95
  351. Schedulability-Driven Frame Packing for Multi-Cluster Distributed Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    ACM SIGPLAN Conference on Languages, Compilers and Tools for Embedded Systems, 11-13 June 2003, San Diego, USA, pp. 113-122
  352. Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Design Automation and Test in Europe (DATE 2003) Conference, 3-7 March 2003, Munich, Germany, pp. 184-189
  353. Schedulability Analysis of Real-Time Systems with Stochastic Task Execution Times
    Sorin Manolache
    Licentiate Thesis No. 985, Dept. of Computer and Information Science, Linköping University, Dec. 2002
  354. An Integrated Framework for the Design and Optimization of SOC Test Solutions
    Erik Larsson, Zebo Peng
    SOC (System-on-a-Chip) Testing for Plug and Play Test Automation.
    Book Series: FRONTIERS IN ELECTRONIC TESTING, Volume 21, Krishnendu Chakrabarty (editor)
    Kluwer Academic Publishers, ISBN 1-4020-7205-8, September 2002, pp. 21-36
  355. Integrated Design and Test Generation Under Internet Based Environment MOSCITO
    Andre Schneider, Karl-Heinz Diener, Eero Ivask, Raimund Ubar, Elena Gramatova, Thomas Hollstein, Wieslaw Kuzmicz, Zebo Peng
    EUROMICRO Symposium on Digital System Design (DSD'2002), Dortmund, Germany, Sept. 4-6, 2002, pp. 187-194
  356. Optimal Test Access Mechanism Scheduling using Preemption and Reconfigurable Wrappers
    Erik Larsson, Hideo Fujiwara
    Workshop on RTL and High Level Testing, Guam, USA, November 21-22, 2002
  357. High-Level Test Generation and Built-In Self-Test Techniques for Digital Systems
    Gert Jervan
    Licentiate Thesis No. 973, Dept. of Computer and Information Science, Linköping University, Oct. 2002
  358. Synthesizing Energy-Efficient Embedded Systems with LOPOCOS
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    Design Automation for Embedded Systems, Volume 6, Issue 4, pp. 401-424, Kluwer Academic Publishers, 2002
  359. High-Level and Hierarchical Test Sequence Generation
    Gert Jervan, Zebo Peng, Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
    IEEE International Workshop on High Level Design Validation and Test, Cannes, France, October 27-29, 2002, pp. 169-174
  360. Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    IEE Computers and Digital Techniques Journal, (special issue with best papers from DATE'03 Conference), Vol. 150, No. 5, pp. 303-312, September 2003
  361. Schedulability-Driven Communication Synthesis for Time-Triggered Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Real-Time Systems Journal, No. 24, pp. 297-325, 2004
  362. Integrated Test Scheduling, Test Parallelization and TAM Design
    Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng
    IEEE Asian Test Symposium (ATS'02), Tamuning, Guam, USA, November 18-20, 2002, pp. 397-404
  363. High-Level Synthesis and Test in the MOSCITO-Based Virtual Laboratory
    Andre Schneider, Karl-Heinz Diener, Gert Jervan, Zebo Peng, Jaan Raik, Raimund Ubar, Thomas Hollstein, Manfred Glesner
    The 8th biennial Baltic Electronics Conference (BEC 2002), Tallinn, Estonia, October 6-9, 2002, pp. 287-290
  364. Schedulability Analysis of Multiprocessor Real-Time Applications with Stochastic Task Execution Times
    Sorin Manolache, Petru Eles, Zebo Peng
    Int'l Conference on Computer Aided Design, ICCAD 02, San Jose, California, USA, November 10-14, 2002, pp. 699-706
  365. Formal Verification in a Component-based Reuse Methodology
    Daniel Karlsson, Petru Eles, Zebo Peng
    International Symposium on System Synthesis (ISSS) 2002, Kyoto, Japan, October 2-4, 2002, pp. 156-161
  366. An Approach to Reducing Verification Complexity of Real-Time Embedded Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    14th Euromicro Conference on Real-Time Systems (ECRTS 2002), Work-in-Progress Session, Vienna, Austria, June 19-21, 2002, pp. 45-48.
  367. Power Constrained Preemptive TAM Scheduling
    Erik Larsson, Hideo Fujiwara
    European Test Workshop 2002, Corfu, Greece, May 26-29, 2002, pp. 119-126 (Formal Proceedings)
  368. Power Constrained Preemptive TAM Scheduling
    Erik Larsson, Hideo Fujiwara
    European Test Workshop 2002, Corfu, Greece, May 26-29, 2002, pp. 411-416 (Informal Digest)
  369. Report D1: Report on benchmark identification and planning of experiments to be performed
    Gert Jervan, Zebo Peng, Matteo Sonza Reorda, Massimo Violante
    COTEST Project Report, Politecnico di Torino, Linköping University, 2002.
  370. Report D2: Report on automatic generation of test benches from system-level descriptions
    Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
    COTEST Project Report, Politecnico di Torino, 2002.
  371. Report D4: Final Report on Project Results
    Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante, Petru Eles, Gert Jervan, Zebo Peng
    COTEST Project Report, Politecnico di Torino, Linköping University, 2002.
  372. Report D5: Report on Dissemination Plan
    Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante, Petru Eles, Gert Jervan, Zebo Peng
    COTEST Project Report, Politecnico di Torino, Linköping University, 2002.
  373. Holistic Scheduling and Analysis of Mixed Time/Event-Triggered Distributed Embedded Systems
    Traian Pop, Petru Eles, Zebo Peng
    10th International Symposium on Hardware/Software Codesign (CODES 2002), Estes Park, Colorado, USA, May 6-8, 2002, pp. 187-192
  374. Symbolic Model Checking of Dual Transition Petri Nets
    Mauricio Varea, Bashir M. Al-Hashimi, Luis Alejandro Cortes, Petru Eles, Zebo Peng
    10th International Symposium on Hardware/Software Codesign (CODES 2002), Estes Park, Colorado, USA, May 6-8, 2002, pp. 43-48.
  375. An Integrated Framework for the Design and Optimization of SOC Test Solutions
    Erik Larsson, Zebo Peng
    Journal of Electronic Testing; Theory and Applications (JETTA), for the Special Issue on Plug-and-Play Test Automation for System-on-a-Chip August 2002 issue (vol. 18, no. 4/5), pp. 385-400
  376. BIST Synthesis: An Approach to Resources Optimization under Test Time Constraints
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    5th Design and Diagnostic of Electronic Computer Systems (DDECS2002), Brno, Czech Republic, April 16-19, 2002, pp. 346-351
  377. Verification of Real-Time Embedded Systems using Petri Net Models and Timed Automata
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    8th International Conference on Real-Time Computing Systems and Applications (RTCSA 2002), Tokyo, Japan, March 18-20, 2002, pp. 191-199.
  378. Flexibility Driven Scheduling and Mapping for Distributed Real-Time Systems
    Paul Pop, Petru Eles, Zebo Peng
    8th International Conference on Real-Time Computing Systems and Applications (RTCSA 2002), March 18-20, 2002, Tokyo, Japan, pp. 337-346
  379. A Hybrid BIST Architecture and its Optimization for SoC Testing
    Gert Jervan, Zebo Peng, Raimund Ubar, Helena Kruus
    IEEE 2002 3rd International Symposium on Quality Electronic Design (ISQED'02), March 18-20, 2002, San Jose, California, USA, pp. 273-279
  380. Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems
    Marcus Schmitz, Bashir M. Al-Hashimi, Petru Eles
    Design Automation and Test in Europe Conference (DATE 2002), Paris, France, March 4-8, 2002, pp. 514-521
  381. A Petri Net based Modeling and Verification Technique for Real-Time Embedded Systems
    Luis Alejandro Cortes
    Licentiate Thesis No. 919, Dept. of Computer and Information Science, Linköping University, Dec. 2001.
  382. Modeling and Verification of Embedded Systems using Petri Net based Methods: Application to an Industrial Case
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    SAVE Project Report, Dept. of Computer and Information Science, Linköping University, December 2001.
  383. The Design and Optimization of SOC Test Solutions
    Erik Larsson, Zebo Peng, Gunnar Carlsson
    ICCAD-2001, DoubleTree Hotel, San Jose, California, November 4-8, 2001, pp. 523-530
  384. Using Tabu Search Method for Optimizing the Cost of Hybrid BIST
    Raimund Ubar, Helena Kruus, Gert Jervan, Zebo Peng
    16th Conference on Design of Circuits and Integrated Systems (DCIS 2001), Porto, Portugal, November 20-23, 2001, pp. 445-450
  385. Test Scheduling and Scan-Chain Division Under Power Constraint
    Erik Larsson, Zebo Peng
    Tenth Asian Test Symposium (ATS 2001), Kyoto, Japan, November 19-21, 2001, pp. 259-264
  386. Hierarchical Modeling and Verification of Embedded Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    Euromicro Symposium on Digital Systems Design, Warsaw, Poland, Sept. 4-6, 2001, pp. 63-70.
  387. Fast Test Cost Calculation for Hybrid BIST in Digital Systems
    Raimund Ubar, Gert Jervan, Zebo Peng, Elmet Orasson, Rein Raidma
    Euromicro Symposium on Digital Systems Design, Warsaw, Poland, Sept. 4-6, 2001, pp. 318-325
  388. Challenges for Future System-on-Chip Design
    Thomas Hollstein, Zebo Peng, Raimund Ubar, Manfred Glesner
    15th European Conference on Circuit Theory and Design, Espoo, Finland, August 28-31, 2001
  389. An Approach to Incremental Design of Distributed Embedded Systems
    Paul Pop, Petru Eles, Traian Pop, Zebo Peng
    38th Design Automation Conference (DAC), Las Vegas, USA, June 18-22, 2001, pp. 450-455 (best paper award candidate)
  390. Memory and Time-Efficient Schedulability Analysis of Task Sets with Stochastic Execution Time
    Sorin Manolache, Petru Eles, Zebo Peng
    13th Euromicro Conference on Real-Time Systems, Delft, The Netherlands, June 13-15, 2001, pp. 19-26
  391. SOCWARE: A New Swedish Design Cluster For System-On-Chip
    Petru Eles, Peter Nilsson, Hannu Tenhunen
    International Conference on Microelectronic Systems Education, Las Vegas, USA, June 2001, pp. 44-45
  392. System-on-Chip Test Parallelization Under Power Constraints
    Erik Larsson, Zebo Peng
    European Test Workshop, Stockholm, Sweden, May 28-June 1, 2001.
  393. A Front End to a Java Based Environment for the Design of Embedded Systems
    Daniel Karlsson, Petru Eles, Zebo Peng
    4th IEEE DDECS Workshop, Gyor, Hungary, April 2001, pp. 71-78
  394. From Haskell to PRES+ Basic Translation Procedures
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    SAVE Project Report, Dept. of Computer and Information Science, Linköping University, April 2001.
  395. Minimizing System Modification in an Incremental Design Approach
    Paul Pop, Petru Eles, Traian Pop, Zebo Peng
    International Workshop on Hardware/Software Codesign (CODES 2001), Copenhagen, Denmark, April 25-27, 2001, pp. 183-188
  396. BIST Synthesis: An Approach to Resource Optimization under Test Time Constraints
    Abdil Rashid Mohamed, Zebo Peng, Petru Eles
    International Test Synthesis Workshop, Santa Barbara, USA, March 26-28, 2001
  397. Improving the Efficiency of Timing Simulation of Digital Circuits
    Artur Jutman, Raimund Ubar, Zebo Peng
    Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, 13-16 March, 2001, pp. 460-466
  398. An Integrated System-On-Chip Test Framework
    Erik Larsson, Zebo Peng
    Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, 13-16 March, 2001, pp. 138-144
  399. An Integrated System-Level Design for Testability Methodology
    Erik Larsson
    Ph. D. Thesis No. 660, Department of Computer and Information Science, Linköpings universitet, Sweden, December 2000.
  400. Test Cost Minimization for Hybrid BIST
    Gert Jervan, Zebo Peng, Raimund Ubar
    IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'2000), Yamanashi, Japan, 25-27 October, 2000, pp. 283-291.
  401. Verification of Embedded Systems using a Petri Net based Representation
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    13th International Symposium on System Synthesis (ISSS 2000), Madrid, Spain, Sept. 20-22, 2000, pp. 149-155.
  402. Definitions of Equivalence for Transformational Synthesis of Embedded Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    6th International Conference on Engineering of Complex Computer Systems (ICECCS 2000), Tokyo, Japan, Sept. 11-15, 2000, pp. 134-142.
  403. Formal Coverification of Embedded Systems using Model Checking
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    26th Euromicro Conference (Digital Systems Design), Maastricht, The Netherlands, Sept. 5-7, 2000, vol. I, pp. 106-113.
  404. Test Infrastructure Design and Test Scheduling Optimization
    Erik Larsson, Zebo Peng
    European Test Workshop, Cascais, Portugal, May 23-26, 2000.
  405. Scheduling with Bus Access Optimization for Distributed Embedded Systems
    Petru Eles, Alex Doboli, Paul Pop, Zebo Peng
    IEEE Transactions on VLSI Systems, vol. 8, No 5, 472-491, October 2000.
  406. Verification of Heterogeneous Electronic Systems using Model Checking
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    SAVE Project Report, Dept. of Computer and Information Science, Linköping University, July 2000.
  407. Schedulability Analysis for Systems with Data and Control Dependencies
    Paul Pop, Petru Eles, Zebo Peng
    12th Euromicro Conference on Real-Time Systems, Stockholm, June 19-21, 2000, pp. 201-208
  408. Performance Estimation for Embedded Systems with Data and Control Dependencies
    Paul Pop, Petru Eles, Zebo Peng
    8th International Workshop on Hardware/Software Codesign (CODES 2000), San Diego, May 3-5, 2000, pp. 62-66
  409. Scheduling and Communication Synthesis for Distributed Real-Time Systems
    Paul Pop
    Licentiate Thesis No. 832, Linköpings Universitet, Linköping, Sweden, 2000 (Opponent: Prof. Hans Hansson, Mälardalen University, Sweden).
  410. Process Scheduling and Performance Estimation for the Co-Synthesis of Embedded Systems
    Paul Pop
    Master Thesis, Department of Computing, "Politehnica" University of Timisoara, Romania, 1997
  411. A Technique for Test Infrastructure Design and Test Scheduling
    Erik Larsson, Zebo Peng
    Design and Diagnostic of Electronic Circuits and Systems Workshop (DDECS 2000), Smolenice Castle, Slovakia, April 5-7, 2000, pp. 26-29
  412. Bus Access Optimization for Distributed Embedded Systems Based on Schedulability Analysis
    Paul Pop, Petru Eles, Zebo Peng
    Design, Automation & Test In Europe Conference (DATE 2000), Paris, France, March 27-30, 2000, pp. 567-574
  413. System-on-Chip Test Bus Design and Test Scheduling
    Erik Larsson, Zebo Peng
    International Test Synthesis Workshop, Santa Barbara, USA, March 6-8.
  414. Modeling of Real-Time Embedded Systems in an Object-Oriented Design Environment with UML
    Razvan Jigorea, Sorin Manolache, Petru Eles, Zebo Peng
    3rd IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC 2000), Newport Beach, California, 15-17 March 2000, pages 210-213
  415. SIGNAL-SIMULINK: Hybrid System Co-simulation
    Stephane Tudoret
    Technical Report. Linköping Electronic Articles in Computer and Information Science. Vol. 4(2000): nr 20, February 21, 2000
  416. Verification Methodology for Heterogeneous Hardware/Software Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    SAVE Project Report, Dept. of Computer and Information Science, Linköping University, January 2000.
  417. An Improved Register-Transfer Level Functional Partioning Approach for Testability
    Tianruo Yang, Zebo Peng
    Journal of Systems Architecture, Vol. 46, No. 3, January 2000, pages 209-223
  418. Schedulability-Driven Communication Synthesis for Time Triggered Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    6th International Conference on Real-Time Computing Systems and Applications (RTCSA'99), Hong Kong, December 13-15, 1999, pages 287-294
  419. A Petri Net Based Model for Heterogeneous Embedded Systems
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    17th IEEE NORCHIP Conference, Oslo, Norway, November 8-9, 1999, pp. 248-255.
  420. High-level Test Synthesis with Hierarchical Test Generation
    Gert Jervan, Petru Eles, Zebo Peng, Jaan Raik, Raimund Ubar
    IEEE NORCHIP Conference, Oslo, Norway, November 8-9, 1999, pages 291-296
  421. Modelling and Simulation of Heterogeneous Embedded Systems with UML
    Razvan Jigorea, Sorin Manolache, Petru Eles, Zebo Peng
    The 1999 Conference of the Scandinavian Simulation Society, SIMS99, Linköping, Sweden, October 18-19, 1999, pages 160-167
  422. An Improved Scheduling Technique for Time-Triggered Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    25th Euromicro Conference, Milan, Italy, September 8-10, 1999, pages 303-310
  423. An Estimation-based Technique for Test Scheduling
    Erik Larsson, Zebo Peng
    Electronic Circuits and Systems Conference, Bratislava, Slovakia, September 6-8, 1999, pages 25-28
  424. A Hierarchical Test Generation Technique for Embedded Systems
    Gert Jervan, Petru Eles, Zebo Peng
    Electronic Circuits and Systems Conference, Bratislava, Slovakia, September 6-8, 1999, pages 21-24
  425. Combining theorem proving and continuous models in synchronous design
    Simin Nadjm-Tehrani, Ove Akerlund
    World Congress on Formal Methods, Tolouse, France, September 1999, Volume II, LNCS 1709, Springer Verlag, pages 1384-1399
  426. Integration of Formal Methods into System Safety and Reliability Analysis
    Ove Akerlund, Simin Nadjm-Tehrani, Gunnar Stalmarck
    17th International Systems Safety Conference, ISSC'99, Florida, USA, August 1999, pages 326-336
  427. A Survey on Hardware/Software Codesign Representation Models
    Luis Alejandro Cortes, Petru Eles, Zebo Peng
    SAVE Project Report, Dept. of Computer and Information Science, Linköping University, Sweden, June 1999.
  428. On Semantics and Correctness of Reactive Rule-based Systems
    Man Lin, Jacek Malec, Simin Nadjm-Tehrani
    Andrei Ershov Third International Conference "Perspectives of System Informatics", PSI'99, Novosibrisk, Russia, July 1999, LNCS, Springer Verlag.
  429. Design of a Multi-formalism Application and Distribution in a Data-flow Context: An Example
    Loic Besnard, Patricia Bournai, Thierry Gautier, Nicolas Halbwachs, Simin Nadjm-Tehrani, Annic Ressouche
    12th International Symposium on Languages for Intentional Programming, Athens, Greece, June 1999, pages 8-30
  430. A Behavioral-Level Testability Enhancement Technique
    Erik Larsson, Zebo Peng
    IEEE European Test Workshop, Constance, Germany, May 25-28, 1999
  431. A Uniform Test Generation Technique for Hardware/Software Systems
    Gert Jervan, Petru Eles, Zebo Peng
    IEEE European Test Workshop, Constance, Germany, May 25-28, 1999
  432. Scheduling with Optimized Communication for Time-Triggered Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    7th International Workshop on Hardware/Software Codesign Rome, Italy, May 3-5, 1999, pages 178-182
  433. Integration of Analog and Discrete Synchronous Design
    Simin Nadjm-Tehrani
    Second International Workshop on Hybrid Systems: Computation and Control, Nijmegen, Netherlands, March 1999, pages 193-208. LNCS 1569, Springer Verlag
  434. Formal Verification of Dynamic Properties in an Aerospace Application.
    Simin Nadjm-Tehrani, Jan-Erik Stromberg
    Formal Methods in System Design, Volume 14, number 2, March 1999, pages 135-169.
  435. Incremental Testability Analysis for Partial Scan Selection and Design Transformations
    Tianruo Yang, Zebo Peng
    Journal of Electronic Testing: Theory and Applications (JETTA), vol. 14, 1999, pp. 101-111, Kluwer Academic Publishers.
  436. High-Level Testability Analysis and Enhancement Techniques
    Erik Larsson
    Licentiate Thesis No. 725, Linköpings Universitet, Linköping, Sweden, November 1998.
  437. Integrated Scheduling and Allocation of High-Level Test Synthesis
    Tianruo Yang, Zebo Peng
    11th Annual IEEE International ASIC Conference (ASIC'98), Rochester, New York, Sept. 13-16, 1998, pp. 81-87.
  438. Register-Transfer Level Testability Analysis and Improvement with Pseudorandom BIST
    Tianruo Yang, Zebo Peng
    IEEE International Workshop on Design, Test and Applications of Electronic Systems (WDTA-98), Dubrovnik, Croatia, June 8-10, 1998, pp. 117-120.
  439. Testability Analysis of Behavioral-Level VHDL Specifications
    Erik Larsson, Zebo Peng
    IEEE European Test Workshop , Barcelona, Spain, May 27-29, 1998.
  440. Incremental Testability Analysis for Partial Scan Selection and Design Transformations
    Tianruo Yang, Zebo Peng
    IEEE European Test Workshop , Barcelona, Spain, May 27-29, 1998.
  441. Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems
    Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alex Doboli, Paul Pop
    24th EUROMICRO Conference, 1998.
  442. Estimation and Consideration of Interconnection Delays during High-Level Synthesis
    Jonas Hallberg, Zebo Peng
    24th EUROMICRO Conference, 1998.
  443. An improved register-transfer level functional partitioning approach for testability
    Tianruo Yang, Zebo Peng
    24th EUROMICRO Conference, 1998.
  444. An Improved Register-Transfer Level Functional Partioning Approach for Testability
    Tianruo Yang, Zebo Peng
    Fifth IEEE International Test Synthesis Workshop Red Lion Resort, Santa Barbara, CA, USA, March 9-11, 1998.
  445. An Efficient Algorithm to Integrate Scheduling and Allocation in High-Level Test Synthesis
    Tianruo Yang, Zebo Peng
    Design, Automation and Test in Europe - DATE, Paris, Feb. 23-26, 1998.
  446. Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems
    Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Paul Pop, Alex Doboli
    Design, Automation and Test in Europe - DATE, Paris, Feb. 23-26, 1998.
  447. Analysis and Synthesis of Communication-Intensive Heterogeneous Real-Time Systems
    Paul Pop
    Second EDAA Ph.D. Forum, Design Automation and Test in Europe Conference, Paris, France, 2004
  448. Scheduling, Mapping and Communication Synthesis for Distributed Real-Time Systems
    Paul Pop
    ACM SIGDA PhD Forum at the Design Automation Conference (DAC 2002), New Orleans, LA, USA, 2002
  449. Communication Scheduling for Time-Triggered Systems
    Paul Pop, Petru Eles, Zebo Peng
    11th Euromicro Conference on Real-Time Systems , York, England, June 9-11, 1999 (Work in Progress Proceedings)
  450. Scheduling Driven Partitioning of Heterogeneous Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    Swedish Workshop on Computer Systems Architecture, pp. 99-102, 1998.
  451. Incremental Mapping and Scheduling for Distributed Heterogeneous Real-Time Systems
    Paul Pop, Petru Eles, Zebo Peng
    Real-Time in Sweden, August 18-19, 2003, Västerås, Sweden
  452. An Improved Scheduling Technique for Time-Triggered Embedded Systems
    Paul Pop, Petru Eles, Zebo Peng
    SNART'99 Real-Time Systems Conference, August 25-25, 2003, Linkö;ping, Sweden
  453. Comparing Web Applications with Desktop Applications: An Empirical Study
    Paul Pop
    Technical Report
  454. The Electronic Publishing: A New WWW Technology Based on News Semantics
    Cristian Ionitoiu, Paul Pop, Remus Miclea
    Workshop on Networking and Information Services in Central and Eastern European Countries, Blagoevgrad, Bulgaria, 8-11 July, 1996
  455. Scheduling under Data and Control Dependencies for Heterogeneous Architectures
    Alex Doboli, Petru Eles
    International Conference on Computer Design - ICCD, 1998.
  456. Hierarchical Test Generation for Digital Systems
    Marina Brik, Gert Jervan, Antti Markus, Priidu Paomets, Jaan Raik, Raimund Ubar
    Mixed Design of Integrated Circuits and Systems, Kluwer Academic Publishers, pp. 131-136, 1998.
  457. Hierarchical Test Architecture and Board-Level Test Controller Synthesis
    Jan Hakegard
    Licentiate Thesis No. 676, Linköpings Universitet, Linköping, Sweden, March 1998.
  458. Hierarchical Test Generation with Multi-Level Decision Diagram Models
    Gert Jervan, Antti Markus, Jaan Raik, Raimund Ubar
    7th IEEE North Atlantic Test Workshop, West Greenwich, RI, USA, pp. 26-33, May 28-29, 1998.
  459. DECIDER: A Decision Diagram based Hierarchical Test Generation System
    Gert Jervan, Antti Markus, Jaan Raik, Raimund Ubar
    DDECS'98 Conference, pp. 269-273, Szczyrk, Poland, September 2-4, 1998.
  460. System Synthesis with VHDL
    Petru Eles, Krzysztof Kuchcinski, Zebo Peng
    Kluwer Academic Publishers, Boston, Dec. 1997, 384 pages.
  461. Early Prediction of Testability by Analyzing Behavioral VHDL Specifications
    Erik Larsson, Zebo Peng
    Norchip Conference, Tallinn, November 10-11, 1997. pp. 259-266
  462. Incremental Testability Analysis for Design Transformations
    Tianruo Yang, Zebo Peng
    Norchip Conference, Tallinn, November 10-11, 1997. pp. 267-274
  463. Design and Synthesis of a Generic Board-Level Test Controller
    Jan Hakegard, Zebo Peng
    23rd Euromicro Conference (Short Contribution), Budapest, Hungrary, September 1-4, 1997.
  464. Re-Partioning for Hardware/Software Co-Synthesis
    Erik Stoy, Zebo Peng
    23rd Euromicro Conference (Short Contribution), Budapest, Hungrary, September 1-4, 1997.
  465. System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search
    Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alex Doboli
    Journal on Design Automation for Embedded Systems, vol. 2, 5-32, 1997.
  466. Post-Synthesis Back-Annotation of Timing Information in Behavioral VHDL
    Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alex Doboli
    Journal of Systems Architecture, The Euromicro Journal, vol. 42, 725-741, 1997
  467. Inter-Domain Movement of Functionality as a Repartitioning Strategy for Hardware/Software Co-Design
    Erik Stoy, Zebo Peng
    Journal of Systems Architecture, the Euromicro Journal , vol. 43, 97-98, 1997.
  468. A Controller Testability Analysis and Enhancement Technique
    Xinli Gu, Erik Larsson, Krzysztof Kuchcinski, Zebo Peng
    European Design and Test Conference , Paris, March 17-20, 1997, pp. 153-157
  469. Integrated Scheduling and Allocation in High-Level Test Synthesis
    Tianruo Yang, Zebo Peng
    IEEE European Test Workshop (ETW-97) , Cagliari, Italy, 1997.
  470. An Integrated Approach to Data Path Synthesis for Testability
    Tianruo Yang, Zebo Peng
    Fourth International Test Synthesis Workshop (ITSW-97) , Santa Barbara, USA, 1997.
  471. Time-deterministic Hybrid Transition Systems
    Simin Nadjm-Tehrani
    Fifth international workshop on Hybrid Systems (HS V), Notre Dame, Indiana, September 1997, LNCS 1567, Springer Verlag, pages 238-250.
  472. Towards Real-Time Systems Education with PBL
    Simin Nadjm-Tehrani
    Second international workshop on Real-Time Systems Education (RTEW), Montreal, Canada, June 1997, IEEE Computer Society Press, pages 39-41.
( ! ) perl script by Giovanni Squillero with modifications from Gert Jervan   (v3.1, p5.2, September-2002-)
Last modified on Monday December 04, 2006 by Gert Jervan