viaiz_date05

Design Optimization of Time- and Cost-Constrained Fault-Tolerant Distributed Embedded Systems

Viacheslav Izosimov Author homepage
 
Paul Pop Author homepage
Petru Eles Author homepage
 
Zebo Peng Author homepage

Design Automation and Test in Europe Conference (DATE 2005), Munich, Germany, March 7-11, 2005, pp. 864-869 (best paper award)

ABSTRACT
In this paper we present an approach to the design optimization of fault-tolerant embedded systems for safety-critical applications. Processes are statically scheduled and communications are performed using the time-triggered protocol. We use process re-execution and replication for tolerating transient faults. Our design optimization approach decides the mapping of processes to processors and the assignment of fault-tolerant policies to processes such that transient faults are tolerated and the timing constraints of the application are satisfied. We present several heuristics which are able to find fault-tolerant implementations given a limited amount of resources. The developed algorithms are evaluated using extensive experiments, including a real-life example.


Related files:
viaiz_date05.formal.pdfVersion in the formal proceedings, Adobe Acrobat portable document
viaiz_date05.slides.pdfPresentation Slides, Adobe Acrobat portable document
viaiz_date05.slides.pptPresentation Slides, Microsoft Powerpoint presentation


[IPEP05] Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng, "Design Optimization of Time- and Cost-Constrained Fault-Tolerant Distributed Embedded Systems", Design Automation and Test in Europe Conference (DATE 2005), Munich, Germany, March 7-11, 2005, pp. 864-869 (best paper award)
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