Automatic Test Program Generation for Out-of-Order Superscalar Processors
21st IEEE Asian Test Symposium (ATS 2012), Niigata, Japan, November 19-22, 2012.
This paper presents a high-level automatic test instruction generation (HATIG) technical that allows, for the first time, to test the scheduling unit of an out-of-order super scalar processor. This technique leverages on existing bounded model checking tools in order to generate software-based self-testing programs from a global EFSM model of the processor under test. The experimental results have demonstrated the efficiency of the proposed technique.
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[ZREP12] Ying Zhang, Ahmed Rezine, Petru Eles, Zebo Peng, "Automatic Test Program Generation for Out-of-Order Superscalar Processors", 21st IEEE Asian Test Symposium (ATS 2012), Niigata, Japan, November 19-22, 2012.