naist02_erila_2

Optimal Test Time for System-on-Chip Designs using Preemptive Scheduling and Reconfigurable Wrappers

Erik Larsson

Hideo Fujiwara

Nara Institute of Science and Technology (NAIST), NAIST-IS-TR2002011, Japan, July 2002.

ABSTRACT

[LF02] Erik Larsson, Hideo Fujiwara, "Optimal Test Time for System-on-Chip Designs using Preemptive Scheduling and Reconfigurable Wrappers", Nara Institute of Science and Technology (NAIST), NAIST-IS-TR2002011, Japan, July 2002.

( ! ) perl script by Giovanni Squillero with modifications from Gert Jervan (v3.1, p5.2, September-2002-)