naist02_erila_1

Preemptive Power Constrained TAM Scheduling for Scan-based System-on-Chip

Erik Larsson

Hideo Fujiwara

Nara Institute of Science and Technology (NAIST), ISSN 0919-9527, NAIST-IS-TR2002003, Japan, January 2002.

ABSTRACT

[LF02] Erik Larsson, Hideo Fujiwara, "Preemptive Power Constrained TAM Scheduling for Scan-based System-on-Chip", Nara Institute of Science and Technology (NAIST), ISSN 0919-9527, NAIST-IS-TR2002003, Japan, January 2002.

( ! ) perl script by Giovanni Squillero with modifications from Gert Jervan (v3.1, p5.2, September-2002-)