dft03_anlar

Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip

Anders Larsson Author homepage
 
Erik Larsson Author homepage
Petru Eles Author homepage
 
Zebo Peng Author homepage

18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), Cambridge, MA, USA, November 3-5, 2003, pp. 385-392

ABSTRACT
Test scheduling and Test Access Mechanism (TAM)design are two important tasks in the development of a System-on-Chip (SOC)test solution.Previous test scheduling techniques assume a dedicated designed TAM which have the advantage of high exibility in the scheduling process. However,hardware verhead for implementing the TAM and additional routing is required of the TAMs.In this paper we propose a technique that makes use of the existing functional buses for the test data transportation inside the SOC.We have dealt with the test scheduling problem with this new assumption and developed a technique to minimise the test-controller and buffer size for a bus- based multi-core SOC.We have solved the problem by using a constraint logic pr gramming (CLP) technique and demonstrated the ef ciency of our approach by running experiments on benchmark designs.


Related files:
dft03_anlar.pdfAdobe Acrobat portable document

Copyright note for papers published by the IEEE Computer Society:
Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works, must be obtained from the IEEE.


[LLEP03] Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng, "Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip", 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), Cambridge, MA, USA, November 3-5, 2003, pp. 385-392
( ! ) perl script by Giovanni Squillero with modifications from Gert Jervan   (v3.1, p5.2, September-2002-)
Last modified on Monday December 04, 2006 by Gert Jervan