NORCHIP

Early Prediction of Testability by Analyzing Behavioral VHDL Specifications

Erik Larsson Author homepage
 
Zebo Peng Author homepage

Norchip Conference, Tallinn, November 10-11, 1997. pp. 259-266

ABSTRACT
A behavioral testability analysis technique is proposed for early prediction of testability by analyzing behavioral specifications written in VHDL. The technique extracts functional properties by an analysis of variable range, statement hardness and dependency relation between variables of the specification. It predicts the testability for the whole design with a low computational cost. Another feature of the proposed technique is that it reduces the number of design iterations since the hard-to-test parts of the design are grouped and several testability improvement techniques can be applied in each design iteration. Experimental results show that the behavioral testability analysis technique predicts the hard-to-test parts accurately and efficiently.


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[LP97] Erik Larsson, Zebo Peng, "Early Prediction of Testability by Analyzing Behavioral VHDL Specifications", Norchip Conference, Tallinn, November 10-11, 1997. pp. 259-266
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