Test Infrastructure Design and Test Scheduling Optimization
European Test Workshop, Cascais, Portugal, May 23-26, 2000.
We propose a technique for test scheduling and design of test bus infrastructure where test application time as well as test bus length and width are minimized while constraints on power consumption and test resources are considered. Our approach is suitable for repeated use in the design space exploration process due to its low computational cost. For the final design, we use simulated annealing to optimize the solution. The proposed technique is implemented and experimental results show the efficiency of our approach.
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[LP00] Erik Larsson, Zebo Peng, "Test Infrastructure Design and Test Scheduling Optimization", European Test Workshop, Cascais, Portugal, May 23-26, 2000.