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AUTHOR
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VISHWANI AGRAWAL
Found 1 entry
On Minimization of Peak Power for Scan Circuit during Test
Jaynarayan T Tudu, Erik Larsson, Virendra Singh, Vishwani Agrawal
European Test Symposium (ETS 2009), Sevilla, Spain, May 25-29, 2009, pp. 25-30.
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