Linköping University

Department of Computer and Information Science

Publication Register

Articles reported during 1998
as published or accepted for publication

Subset: articles originating in ESLAB during 1998

The IDA publication register contains information about articles written by researchers at IDA. The usual bibliographic references are combined with links to on-line copies of those articles whenever available and known. The links marked "[ALP]" and "[ECP]" are explained at the end of the present page.
If the article you are looking for is not in this list, then
maybe it as already reported last year - see last year's list.

004
Tianruo Yang, Zebo Peng.
An Improved Register-Transfer Level Functional Partioning Approach for Testability.
Proceedings of the 5th IEEE International Test Synthesis Workshop at Red Lion Resort, Santa Barbara, CA, USA, March 9-11, 1998.

020
Tianruo Yang, Zebo Peng.
Incremental testability analysis for partial scan selection and design transformations.
Proceedings of the IEEE European Test Workshop 1998 (ETW98),pp. 107-112, Barcelona, Spain, May 27-29, 1998.

021
Erik Larsson, Zebo Peng.
Testability Analysis of Behavioral-Level VHDL Specifications.
Proceedings of the IEEE European Test Workshop 1998 (ETW98), pp. 143-144, Barcelona, Spain, May 27-29, 1998.
[postscript]

057
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop.
Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems.
Proceedings of the DATE Conference, pp. 132-138, Paris, February 23-26, 1998.

063
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop.
Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems.
Proceedings of the 24th EUROMICRO Conference, pp. 168-175, August 25-27, 1998.

087
Tianruo Yang, Zebo Peng.
Integrated Scheduling and Allocation of High-Level Test Synthesis.
Proceedings of the 1998 11th IEEE International ASIC Conference, pp. 81-87, 13-16 September 1998, in Rochester, New York, USA.

091
Alexa Doboli, Petru Eles.
Scheduling under Data and Control Dependencies for Heterogeneous Architectures.
Proceedings of the International Conference on Computer Design (ICCD'98), pp. 602-608, October 98, Austin, Texas.

093
Tianruo Yang, Zebo Peng.
Incremental Testability Analysis for Partial Scan Selection and Design Transformations.
Journal of Electronic Testing: Theory and Application, December, 1998, Kluwer Academic Publishers.

103
Tianruo Yang, Zebo Peng.
Register Transfer Level Testability Analysis and Improvement with Pseudorandom BIST.
Proceedings of the IEEE International Workshop on Design, Test and Applications of Electronic Systems (WDTA-98), pp. 117-120, Dubrovnik, Croatia, June 8-9, 1998.

135
Paul Pop, Petru Eles, Zebo Peng.
Scheduling Driven Partitioning of Heterogeneous Embedded Systems.
Proceedings of the 7th Swedish Workshop on Computer Architecture, Gothemburg, pp. 99-102, June 3-5, 1998.

136
Tianruo Yang, Zebo Peng.
An Efficient Algorthm to Integrate Scheduling and Allocation in High-Level Test Synthesis.
Proceedings of Design, Automation and Test in Europe (DATE-98), pp. 74-81, Paris, France, February 1998.

137
Tianruo Yang, Zebo Peng.
High-level test synthesis for built-in self-testable designs.
Proceedings of the 7th Workshoop on Computer System Architectures (DSA-98), pp. 89-93, Gothemburg, Sweden, June, 1998.

138
Tianruo Yang, Zebo Peng.
An Improved Register-Transfer Level Functional Partitioning Approach for Testability.
Proceeding of the 24th EUROMICRO Workshop on Digital System Design: Architectures, Method and Tools (DSD-98),vpp. 107-114, Västerås, Sweden, August, 1998.

194
M. Brik, G. Jervan, A. Markus, P. Paomets, J. Raik, R. Ubar.
Hierarchical Test Generation for Digital Systems .
Published in Mixed Design of Integrated Circuits and Systems, Kluwer Academic Publishers, pp. 131-136, 1998.

195
G. Jervan, A. Markus, J. Raik, R. Ubar.
Hierarchical Test Generation with Multi-Level Decision Diagram Models.
Proceedings of the 7th IEEE North Atlantic Test Workshop, West Greenwich, RI, USA, pp. 26-33, May 28-29, 1998.

196
G. Jervan, A. Markus, J. Raik, R. Ubar.
DECIDER: A Decision Diagram based Hierarchical Test Generation System.
Proceedings of the DDECS'98 Conference, pp. 269-273, Szczyrk, Poland, September 2-4, 1998.

239
Paul Pop, Petru Eles, Zebo Peng.
Scheduling with Optimized Communication for Time-Triggered Embedded Systems.
Accepted for publication at the 7th International Workshop on Hardware/Software Codesign held in Rome, Italy, May 3-5, 1999.

Article Locator Pages

In some cases, the database maintains relatively extensive information about an article: links to the journal, conference, or publisher where the article was published, links to several generations of the article, etc. Fort this reason, the publication register constructs Article Locator Pages (ALP), that is, HTML pages containing up-to-date information about the publication status of the article in question and, as often as possible, links to the full text of that article.

It is intended that the ALP shall be permanently usable as a key to the full article and to current information about it. ALP:s have a systematic naming; an ALP noted below as number 002 under the headling 1997 is represented at the URL http://www.ida.liu.se/ext/pur/1997/002.html.

E-Press Cover Pages

For those articles published by the Linköping University Electronic Press, the table above also indicates the E-Press cover page, using the ECP. The ECP is used by the E-Press to characterize the instance of an article as published by them. It contains links to various versions or aspects of the article: abstract, postscript, PDF version, etc.

Amendments

Users at IDA please click here for information about how to enter your article into the register and to modify the information about it.

This page is maintained by [EMTEK]; latest update 4 August 1997.